1. 02 Jul, 2009 3 commits
  2. 14 Mar, 2009 1 commit
  3. 06 Mar, 2009 1 commit
  4. 21 Oct, 2008 1 commit
  5. 18 Oct, 2008 1 commit
  6. 24 Sep, 2008 1 commit
  7. 20 May, 2008 1 commit
    • Wolfgang Denk's avatar
      Big white-space cleanup. · 53677ef1
      Wolfgang Denk authored
      This commit gets rid of a huge amount of silly white-space issues.
      Especially, all sequences of SPACEs followed by TAB characters get
      removed (unless they appear in print statements).
      Also remove all embedded "vim:" and "vi:" statements which hide
      indentation problems.
      Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
  8. 11 Apr, 2008 1 commit
  9. 28 Mar, 2008 2 commits
  10. 11 Jan, 2008 1 commit
  11. 08 Jan, 2008 1 commit
  12. 17 Aug, 2007 2 commits
  13. 10 Aug, 2007 2 commits
  14. 01 May, 2007 1 commit
  15. 12 Apr, 2007 1 commit
    • Xie Xiaobo's avatar
      Fix two bugs for MPC83xx DDR2 controller SPD Init · 6fbf261f
      Xie Xiaobo authored
      There are a few bugs in the cpu/mpc83xx/spd_sdram.c
      the first bug is that the picos_to_clk routine introduces a huge
      rounding error in 83xx.
      the second bug is that the mode register write recovery field is
      tWR-1, not tWR >> 1.
  16. 02 Mar, 2007 2 commits
    • Xie Xiaobo's avatar
      mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xx · d61853cf
      Xie Xiaobo authored
      The code supply fixed and SPD initialization for MPC83xx DDR2 Controller.
      it pass DDR/DDR2 compliance tests.
      Signed-off-by: default avatarXie Xiaobo <X.Xie@freescale.com>
    • Paul Gortmaker's avatar
      mpc83xx: U-Boot support for Wind River SBC8349 · 91e25769
      Paul Gortmaker authored
      I've redone the SBC8349 support to match git-current, which
      incorporates all the MPC834x updates from Freescale since the 1.1.6
      release,  including the DDR changes.
      I've kept all the SBC8349 files as parallel as possible to the
      MPC8349EMDS ones for ease of maintenance and to allow for easy
      inspection of what was changed to support this board.  Hence the SBC8349
      U-Boot has FDT support and everything else that the MPC8349EMDS has.
      Fortunately the Freescale updates added support for boards using CS0,
      but I had to change spd_sdram.c to allow for board specific settings for
      the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
      default if the board doesn't specify a value.)
      Hopefully this should be mergeable as-is and require no whitespace
      cleanups or similar, but if something doesn't measure up then let me
      know and I'll fix it.
  17. 30 Nov, 2006 1 commit
  18. 29 Nov, 2006 1 commit
  19. 04 Nov, 2006 6 commits
    • Timur Tabi's avatar
      mpc83xx: Replace CFG_IMMRBAR with CFG_IMMR · d239d74b
      Timur Tabi authored
      Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
      tree matches the other 8xxx trees.
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
    • Dave Liu's avatar
      mpc83xx: Fix the incorrect dcbz operation · 90f30a71
      Dave Liu authored
      The 834x rev1.x silicon has one CPU5 errata.
      The issue is when the data cache locked with
      HID0[DLOCK], the dcbz instruction looks like no-op inst.
      The right behavior of the data cache is when the data cache
      Locked with HID0[DLOCK], the dcbz instruction allocates
      new tags in cache.
      The 834x rev3.0 and later and 8360 have not this bug inside.
      So, when 834x rev3.0/8360 are working with ECC, the dcbz
      instruction will corrupt the stack in cache, the processor will
      checkstop reset.
      However, the 834x rev1.x can work with ECC with these code,
      because the sillicon has this cache bug. The dcbz will not
      corrupt the stack in cache.
      Really, it is the fault code running on fault sillicon.
      This patch fix the incorrect dcbz operation. Instead of
      CPU FP writing to initialise the ECC.
      * Fix the incorrect dcbz operation instead of CPU FP
      writing to initialise the ECC memory. Otherwise, it
      will corrupt the stack in cache, The processor will checkstop
      Signed-off-by: default avatarDave Liu <daveliu@freescale.com>
    • Dave Liu's avatar
      mpc83xx: Add MPC8360EMDS basic board support · 5f820439
      Dave Liu authored
      Add support for the Freescale MPC8360EMDS board.
      Includes DDR, DUART, Local Bus, PCI.
    • Timur Tabi's avatar
      mpc83xx: Add support for the MPC8349E-mITX · 2ad6b513
      Timur Tabi authored
      * This patch can only be applied after the following patches have been applied:
        1) DNX#2006090742000024 "Add support for multiple I2C buses"
        2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
        3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
        4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
        5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
      * Add support for the Freescale MPC8349E-mITX reference design platform.
        The second TSEC (Vitesse 7385 switch) is not supported at this time.
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
    • Timur Tabi's avatar
      mpc83xx: Add support for Errata DDR6 on MPC 834x systems · bed85caf
      Timur Tabi authored
      * Errata DDR6, which affects all current MPC 834x processors, lists changes
        required to maintain compatibility with various types of DDR memory.  This
        patch implements those changes.
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
    • Dave Liu's avatar
      mpc83xx: Changed to unified mpx83xx names and added common 83xx changes · f6eda7f8
      Dave Liu authored
      Incorporated the common unified variable names and the changes in preparation
      for releasing mpc8360 patches.
      Signed-off-by: default avatarDave Liu <daveliu@freescale.com>
  20. 16 Apr, 2006 1 commit
  21. 16 Mar, 2006 1 commit
  22. 14 Mar, 2006 1 commit
  23. 01 Aug, 2005 1 commit
  24. 28 Jul, 2005 1 commit