1. 12 Dec, 2016 2 commits
  2. 09 Dec, 2016 2 commits
  3. 08 Dec, 2016 16 commits
    • Alex's avatar
      net/phy/vitesse: Rework RGMII skew configuration for VSC8601 · bb135a01
      Alex authored
      The VSC8601 config tried to add an RGMII skew based on #defines that
      no config defines. That's quite an ugly way to do it. Since the skew
      is only needed on RGMII interfaces, check the interface mode at
      runtime, and apply the settings accordingly.
      Tested on custom board with AM3352 SOC and VSC801 PHY.
      Signed-off-by: default avatarAlexandru Gagniuc <alex.g@adaptrum.com>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
    • Stefan Roese's avatar
      net: usb: r8152: Use ALLOC_CACHE_ALIGN_BUFFER() to allocate the buffers · c7ac1538
      Stefan Roese authored
      Testing on theadorable (Armada XP) has shown, that using this driver
      results in many cache misaligned warning, such as:
      CACHE: Misaligned operation at range [7fabd8fc, 7fabd900]
      This patch now uses the ALLOC_CACHE_ALIGN_BUFFER() macro to allocate the
      buffers on a cache aligned boundary. This fixes all warnings seen on the
      Armada XP platform.
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      Cc: Ted Chen <tedchen@realtek.com>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
    • shaohui xie's avatar
      net: fman: fix 2.5G SGMII settings · bead0880
      shaohui xie authored
      The settings for 2.5G SGMII are wrong, which the 2.5G case is missed in
      set_if_mode(), and the serdes PCS configuration are wrong, this patch uses
      the correct settings took from Linux.
      Signed-off-by: default avatarShaohui Xie <Shaohui.Xie@nxp.com>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
    • oliver@schinagl.nl's avatar
      net: phy: realtek: Only force master mode on rtl8211b/c · cebf3f55
      oliver@schinagl.nl authored
      Commit 525d187a ("net: phy: Optionally force master mode for RTL PHY")
      added the define to force the PHY into master mode. Unfortunatly this is
      an all or nothing switch. So it applies to either all PHY's or no PHY's.
      The bug that define tried to solve was a buggy PLL in the RTL8211C only.
      The Olimex OLinuXino Lime2 has gotten an upgrade where the PHY was
      replaced with an RTL8211E. With this define however, both lime2 boards
      are either forced to master mode or not. We could of course have a
      binary for each board, but the following patch fixes this by adding a
      'quirk' to the flags to the rtl8211b and rtl8211c only. It is now
      possible to force master mode, but only have it apply to the rtl8211b
      and rtl8211c.
      Signed-off-by: default avatarOlliver Schinagl <oliver@schinagl.nl>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
    • oliver@schinagl.nl's avatar
      net: phy: realtek: make define more consistent · cbe40e11
      oliver@schinagl.nl authored
      All internal defines in the realtek phy are with a small X,
      except MIIM_RTL8211X_CTRL1000T_MASTER. Make this more consistent
      Signed-off-by: default avatarOlliver Schinagl <oliver@schinagl.nl>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
    • oliver@schinagl.nl's avatar
      net: phy: realtek: Use the BIT() macro · 020f6762
      oliver@schinagl.nl authored
      The BIT macro is the preferred method to set bits.
      This patch adds the bit macro and converts bit invocations.
      Signed-off-by: default avatarOlliver Schinagl <oliver@schinagl.nl>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
    • Marek Vasut's avatar
      net: phy: micrel: Fix error handling · 75c056d7
      Marek Vasut authored
      Fix the following error, the $ret variable handling must
      be part of the loop, while due to the missing parenthesis
      it was not.
      drivers/net/phy/micrel.c: In function ‘ksz9021_of_config’:
      drivers/net/phy/micrel.c:303:2: warning: this ‘for’ clause does not guard... [-Wmisleading-indentation]
        for (i = 0; i < ARRAY_SIZE(ofcfg); i++)
      drivers/net/phy/micrel.c:305:3: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘for’
         if (ret)
      drivers/net/phy/micrel.c: In function ‘ksz9031_of_config’:
      drivers/net/phy/micrel.c:411:2: warning: this ‘for’ clause does not guard... [-Wmisleading-indentation]
        for (i = 0; i < ARRAY_SIZE(ofcfg); i++)
      drivers/net/phy/micrel.c:413:3: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘for’
         if (ret)
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Joe Hershberger <joe.hershberger@ni.com>
      Acked-by: default avatarJoe Hershberger <joe.hershberger@ni.com>
    • Michal Simek's avatar
      net: xilinx: Use mdio_register_seq() to support multiple instances · b63cb3ab
      Michal Simek authored
      axi_emac, emaclite and gem have the same issue with registering
      multiple instances with mdio busses. mdio bus name has to be uniq but
      drivers are setting up only one name for all.
      Use mdio_register_seq() and pass dev->seq number to allow multiple
      mdio instances registration.
      Reported-by: default avatarPhani Kiran Kara <phanikiran.kara@gmail.com>
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      Series-to: u-boot
      Series-cc: Phani Kiran Kara <phanikiran.kara@gmail.com>
    • Michal Simek's avatar
      common: miiphyutil: Add helper function for mdio bus name · f1a88cf6
      Michal Simek authored
      The most of ethernet drivers are using this mdio registration sequence.
      strcpy(priv->bus->name, "emac");
      Where driver can be used only with one MDIO bus because only unique
      name should be used.
      Other drivers are using unique device name for MDIO registration to
      support multiple instances.
      snprintf(priv->bus->name, sizeof(bus->name), "%s", name);
      With DM dev->seq is used more even in logs
      (like random MAC address generation:
      printf("\nWarning: %s (eth%d) using random MAC address - %pM\n",
             dev->name, dev->seq, pdata->enetaddr);
      where eth%d prefix is used.
      Simplify driver code to register mdio device with dev->seq number
      to simplify mdio registration and reduce code duplication across
      all drivers. With DM_SEQ_ALIAS enabled dev->seq reflects alias setting.
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      For example:
      Board: Xilinx Zynq
      Net:   ZYNQ GEM: e000b000, phyaddr 7, interface rgmii-id
      Warning: ethernet@e000b000 (eth0) using random MAC address -
      eth0: ethernet@e000b000ZYNQ GEM: e000c000, phyaddr ffffffff, interface
      Warning: ethernet@e000c000 (eth3) using random MAC address -
      , eth3: ethernet@e000c000
      ** Bad device size - mmc 0 **
      Checking if uenvcmd is set ...
      Hit any key to stop autoboot:  0
      Zynq> mdio list
      17 - Marvell 88E1111S <--> ethernet@e000b000
      17 - Marvell 88E1111S <--> ethernet@e000c000
    • Michal Simek's avatar
      ARM64: zynqmp: Add updated psu_init_gpl* files · bf0f27f4
      Michal Simek authored
      With origin files there was an issue with serdes setting for SCSI.
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
    • Michal Simek's avatar
      zynqmp works · 8a5db0ab
      Michal Simek authored
    • Nathan Rossi's avatar
      ARM: zynq: Replace dram_init* functions with board_init_f safe ones · 64b67fb2
      Nathan Rossi authored
      The dram_init* functions for the zynq board are not safe for use from
      the board_init_f stage due to its use of the 'tmp' static variable.
      This incorrect use of a static variable was causing rare issues where
      the dram_init function would overwrite some parts the __rel_dyn section
      which caused obscure failures.
      Using the zynq_zybo configuration, U-Boot would generate the following
      error during image load. This was caused due to dram_init overwriting
      the relocations for the "image" variable within the do_bootm function.
      Out of coincidence the un-initialized memory has a compression type
      which is the same as the value for the relocation type R_ARM_RELATIVE.
         Uncompressing Invalid Image ... Unimplemented compression type 23
      It should be noted that this is just one way the issue could surface,
      other cases my not be observed in normal boot flow.
      This change removes the existing code and copies the implementation of
      the dram_init and dram_init_banksize from the
      arch/arm/mach-uniphier/dram_init.c source. This version of these
      functions does not use static variables and behaves the same (reading
      banks from fdt, and using the first bank as the ram_size).
      Signed-off-by: default avatarNathan Rossi <nathan@nathanrossi.com>
      Fixes: 758f29d0 ("ARM: zynq: Support systems with more memory banks")
      Cc: Michal Simek <monstr@monstr.eu>
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
    • Michal Simek's avatar
      travis-ci: Add zynq_zc702 target support · 3fd4de88
      Michal Simek authored
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      Use embded option because of qemu
      Use my repo till Stephen merge it.
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
    • Michal Simek's avatar
      tools: mkimage: Use fstat instead of stat to avoid malicious hacks · 37a2cf6f
      Michal Simek authored
      The patch is fixing:
      "tools: mkimage: Check if file is regular file"
      (sha1: 56c7e801)
      which contains two issues reported by Coverity
      Unchecked return value from stat and incorrect calling sequence where
      attack can happen between calling stat and fopen.
      Using pair in opposite order (fopen and fstat) is fixing this issue
      because fstat is using the same file descriptor (FILE *).
      Also fixing issue with:
      "tools: mkimage: Add support for initialization table for Zynq and
      ZynqMP" (sha1: 3b646080)
      where file wasn't checked that it is regular file.
      Reported-by: Coverity (CID: 154711, 154712)
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      Reviewed-by: default avatarTom Rini <trini@konsulko.com>
      Series-to: trini
      Series-cc: u-boot
    • Michal Simek's avatar
      block: Move ceva driver to DM · 8814c038
      Michal Simek authored
      This patch also includes ARM64 zynqmp changes:
      - Remove platform non DM initialization
      - Remove hardcoded sata base address
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
      Series-to: sjg, agraf@suse.de
      Series-cc: uboot
      Series-version: 4
      Series-changes: 2
      - make ceva_init_sata static
      - Move SATA_CEVA to defconfig
      - Initalized max_lun and max_id platdata
      Series-changes: 3
      - Extend Kconfig help description
      - sort dm.h
      - Remove SPL undefinition from board file
      - Fix Kconfig dependecies
    • Michal Simek's avatar
      dm: Add support for scsi/sata based devices · bce4d18c
      Michal Simek authored
      All sata based drivers are bind and corresponding block
      device is created. Based on this find_scsi_device() is able
      to get back block device based on scsi_curr_dev pointer.
      intr_scsi() is commented now but it can be replaced by calling
      find_scsi_device() and scsi_scan().
      scsi_dev_desc[] is commented out but common/scsi.c heavily depends on
      it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol
      is reassigned to a block description allocated by uclass.
      There is only one block description by device now but it doesn't need to
      be correct when more devices are present.
      scsi_bind() ensures corresponding block device creation.
      uclass post_probe (scsi_post_probe()) is doing low level init.
      SCSI/SATA DM based drivers requires to have 64bit base address as
      the first entry in platform data structure to setup mmio_base.
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
      Series-changes: 2
      - Use CONFIG_DM_SCSI instead of mix of DM_SCSI and DM_SATA
        Ceva sata has never used sata commands that's why keep it in
        SCSI part only.
      - Separate scsi_scan() for DM_SCSI and do not change cmd/scsi.c
      - Extend platdata
      Series-changes: 3
      - Fix scsi_scan return path
      - Fix header location uclass-internal.h
      - Add scsi_max_devs under !DM_SCSI
      - Add new header device-internal because of device_probe()
      - Redesign block device creation algorithm
      - Use device_unbind in error path
      - Create block device with id and lun numbers (lun was there in v2)
      - Cleanup dev_num initialization in block device description
        with fixing parameters in blk_create_devicef
      - Create new Kconfig menu for SATA/SCSI drivers
      - Extend description for DM_SCSI
      - Fix Kconfig dependencies
      - Fix kernel doc format in scsi_platdata
      - Fix ahci_init_one - vendor variable
      Series-changes: 4
      - Fix Kconfig entry
      - Remove SPL ifdef around SCSI uclass
      - Clean ahci_print_info() ifdef logic
  4. 06 Dec, 2016 7 commits
    • Tom Rini's avatar
    • Stefan Roese's avatar
      usb: xhci-pci: Add DM support · 555a3472
      Stefan Roese authored
      This patch adds DM support to the xHCI PCI driver. Enabling its use
      e.g. in x86 platforms.
      Status: On the congatec BayTrail SoM, xHCI still does not work
      correctly with this patch. Some internal timeouts lead to resets (BUG).
      Additional work is needed here. I'm posting this version as WIP so that
      other developers interested in this support might use it as a start.
      I might get back to it in a few weeks as well.
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      Cc: George McCollister <george.mccollister@gmail.com>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Bin Meng <bmeng.cn@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
      Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
    • Jagan Teki's avatar
      MAINTAINERS: Fix ALTERA SOCFPGA Files · f22dede2
      Jagan Teki authored
      Replace arch/arm/cpu/armv7/socfpga/ path with
      arch/arm/mach-socfpga/ and removed board file path
      since board/altera has different boards with relevant
      board maintainers.
      Cc: Marek Vasut <marex@denx.de>
      Signed-off-by: default avatarJagan Teki <jagan@openedev.com>
    • Dinh Nguyen's avatar
      MAINTAINERS: socfpga: update email address for Dinh Nguyen · 6fa0d345
      Dinh Nguyen authored
      With the acquisition of Altera by Intel, my Altera email may be going
      away soon. Update the contact to a more reliable address.
      Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
    • Bill Randle's avatar
      qts-filter.sh: strip DOS line endings and handle continuation lines · 27211b60
      Bill Randle authored
      Some Altera Quartus generated files have long lines that are split with a '\' at
      the end of the line. It also wOn Windows, rites files in DOS format, which can
      confuse some of the processing scripts in this file. This patch solves both issues.
      Signed-off-by: default avatarBill Randle <bill.randle@gmail.com>
      Cc: Marek Vasut <marex@denx.de>
    • Marek Vasut's avatar
      ARM: socfpga: Add boot0 hook to prevent SPL corruption · beee6a30
      Marek Vasut authored
      Valid Altera SoCFPGA preloader image must contain special data at
      offsets 0x40, 0x44, 0x48 and valid instructions at address 0x4c or
      0x50. These addresses are by default used by U-Boot's vector table
      and a piece of reset handler, thus a valid preloader corrupts those
      addresses slightly. While this works most of the time, this can and
      does prevent the board from rebooting sometimes and triggering this
      issue may even depend on compiler.
      The problem is that when SoCFPGA performs warm reset, it checks the
      addresses 0x40..0x4b in SRAM for a valid preloader signature and
      header checksum. If those are found, it jumps to address 0x4c or
      0x50 (this is unclear). These addresses are populated by the first
      few instructions of arch/arm/cpu/armv7/start.S:
      ffff0040 <data_abort>:
      ffff0040:       ebfffffe        bl      ffff0040 <data_abort>
      ffff0044 <reset>:
      ffff0044:       ea000012        b       ffff0094 <save_boot_params>
      ffff0048 <save_boot_params_ret>:
      ffff0048:       e10f0000        mrs     r0, CPSR
      ffff004c:       e200101f        and     r1, r0, #31
      ffff0050:       e331001a        teq     r1, #26
      Without this patch, the CPU will enter the code at 0xffff004c or
      0xffff0050 , at which point the value of r0 and r1 registers is
      undefined. Moreover, jumping directly to the preloader entry point
      at address 0xffff0000 will also fail, because address 0xffff004.
      is invalid and contains the preloader magic.
      Add BOOT0 hook which reserves the area at offset 0x40..0x5f and
      populates offset 0x50 with jump to the entry point. This way, the
      preloader signature is stored in reserved space and can not corrupt
      the SPL code.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Stefan Roese <sr@denx.de>
      Tested-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
    • Anatolij Gustschin's avatar
      socfpga: add support for Terasic DE1-SoC board · e9c847c3
      Anatolij Gustschin authored
      Add CycloneV based Terasic DE1-SoC board. The board boots
      from SD/MMC. Ethernet and USB host is supported.
      Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
      Cc: Marek Vasut <marex@denx.de>
  5. 05 Dec, 2016 13 commits