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/****************************************************************************
*			Realmode X86 Emulator Library
*
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*  Copyright (C) 2007 Freescale Semiconductor, Inc.
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*  Jason Jin <Jason.jin@freescale.com>
*
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*		Copyright (C) 1991-2004 SciTech Software, Inc.
*				     Copyright (C) David Mosberger-Tang
*					   Copyright (C) 1999 Egbert Eich
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*
*  ========================================================================
*
*  Permission to use, copy, modify, distribute, and sell this software and
*  its documentation for any purpose is hereby granted without fee,
*  provided that the above copyright notice appear in all copies and that
*  both that copyright notice and this permission notice appear in
*  supporting documentation, and that the name of the authors not be used
*  in advertising or publicity pertaining to distribution of the software
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*  without specific, written prior permission.	The authors makes no
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*  representations about the suitability of this software for any purpose.
*  It is provided "as is" without express or implied warranty.
*
*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
*  PERFORMANCE OF THIS SOFTWARE.
*
*  ========================================================================
*
* Language:		ANSI C
* Environment:	Any
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* Developer:	Kendall Bennett
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*
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* Description:	This file includes subroutines to implement the decoding
*		and emulation of all the x86 processor instructions.
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*
* There are approximately 250 subroutines in here, which correspond
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* to the 256 byte-"opcodes" found on the 8086.	The table which
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* dispatches this is found in the files optab.[ch].
*
* Each opcode proc has a comment preceeding it which gives it's table
* address.  Several opcodes are missing (undefined) in the table.
*
* Each proc includes information for decoding (DECODE_PRINTF and
* DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc
* functions (START_OF_INSTR, END_OF_INSTR).
*
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* Many of the procedures are *VERY* similar in coding.	This has
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* allowed for a very large amount of code to be generated in a fairly
* short amount of time (i.e. cut, paste, and modify).  The result is
* that much of the code below could have been folded into subroutines
* for a large reduction in size of this file.  The downside would be
* that there would be a penalty in execution speed.  The file could
* also have been *MUCH* larger by inlining certain functions which
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* were called.	This could have resulted even faster execution.	 The
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* prime directive I used to decide whether to inline the code or to
* modularize it, was basically: 1) no unnecessary subroutine calls,
* 2) no routines more than about 200 lines in size, and 3) modularize
* any code that I might not get right the first time.  The fetch_*
* subroutines fall into the latter category.  The The decode_* fall
* into the second category.  The coding of the "switch(mod){ .... }"
* in many of the subroutines below falls into the first category.
* Especially, the coding of {add,and,or,sub,...}_{byte,word}
* subroutines are an especially glaring case of the third guideline.
* Since so much of the code is cloned from other modules (compare
* opcode #00 to opcode #01), making the basic operations subroutine
* calls is especially important; otherwise mistakes in coding an
* "add" would represent a nightmare in maintenance.
*
* Jason ported this file to u-boot. place all the function pointer in
* the got2 sector. Removed some opcode.
*
****************************************************************************/

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#include <common.h>
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#include "x86emu/x86emui.h"

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/*----------------------------- Implementation ----------------------------*/

/* constant arrays to do several instructions in just one function */

#ifdef DEBUG
static char *x86emu_GenOpName[8] = {
    "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"};
#endif

/* used by several opcodes  */
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static u8 (*genop_byte_operation[])(u8 d, u8 s) __attribute__ ((section(GOT2_TYPE))) =
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{
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    add_byte,		/* 00 */
    or_byte,		/* 01 */
    adc_byte,		/* 02 */
    sbb_byte,		/* 03 */
    and_byte,		/* 04 */
    sub_byte,		/* 05 */
    xor_byte,		/* 06 */
    cmp_byte,		/* 07 */
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};

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static u16 (*genop_word_operation[])(u16 d, u16 s) __attribute__ ((section(GOT2_TYPE))) =
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{
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    add_word,		/*00 */
    or_word,		/*01 */
    adc_word,		/*02 */
    sbb_word,		/*03 */
    and_word,		/*04 */
    sub_word,		/*05 */
    xor_word,		/*06 */
    cmp_word,		/*07 */
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};

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static u32 (*genop_long_operation[])(u32 d, u32 s) __attribute__ ((section(GOT2_TYPE))) =
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{
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    add_long,		/*00 */
    or_long,		/*01 */
    adc_long,		/*02 */
    sbb_long,		/*03 */
    and_long,		/*04 */
    sub_long,		/*05 */
    xor_long,		/*06 */
    cmp_long,		/*07 */
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};

/* used by opcodes 80, c0, d0, and d2. */
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static u8(*opcD0_byte_operation[])(u8 d, u8 s) __attribute__ ((section(GOT2_TYPE))) =
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{
    rol_byte,
    ror_byte,
    rcl_byte,
    rcr_byte,
    shl_byte,
    shr_byte,
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    shl_byte,		/* sal_byte === shl_byte  by definition */
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    sar_byte,
};

/* used by opcodes c1, d1, and d3. */
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static u16(*opcD1_word_operation[])(u16 s, u8 d) __attribute__ ((section(GOT2_TYPE))) =
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{
    rol_word,
    ror_word,
    rcl_word,
    rcr_word,
    shl_word,
    shr_word,
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    shl_word,		/* sal_byte === shl_byte  by definition */
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    sar_word,
};

/* used by opcodes c1, d1, and d3. */
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static u32 (*opcD1_long_operation[])(u32 s, u8 d) __attribute__ ((section(GOT2_TYPE))) =
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{
    rol_long,
    ror_long,
    rcl_long,
    rcr_long,
    shl_long,
    shr_long,
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    shl_long,		/* sal_byte === shl_byte  by definition */
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    sar_long,
};

#ifdef DEBUG

static char *opF6_names[8] =
  { "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" };

#endif

/****************************************************************************
PARAMETERS:
op1 - Instruction op code

REMARKS:
Handles illegal opcodes.
****************************************************************************/
void x86emuOp_illegal_op(
    u8 op1)
{
    START_OF_INSTR();
    if (M.x86.R_SP != 0) {
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	DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
	TRACE_REGS();
	DB( printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
	    M.x86.R_CS, M.x86.R_IP-1,op1));
	HALT_SYS();
	}
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    else {
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	/* If we get here, it means the stack pointer is back to zero
	 * so we are just returning from an emulator service call
	 * so therte is no need to display an error message. We trap
	 * the emulator with an 0xF1 opcode to finish the service
	 * call.
	 */
	X86EMU_halt_sys();
	}
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    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38
****************************************************************************/
void x86emuOp_genop_byte_RM_R(u8 op1)
{
    int mod, rl, rh;
    uint destoffset;
    u8 *destreg, *srcreg;
    u8 destval;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if(mod<3)
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	{ destoffset = decode_rmXX_address(mod,rl);
	DECODE_PRINTF(",");
	destval = fetch_data_byte(destoffset);
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	destval = genop_byte_operation[op1](destval, *srcreg);
	store_data_byte(destoffset, destval);
	}
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    else
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	{			/* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rl);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*destreg = genop_byte_operation[op1](*destreg, *srcreg);
	}
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    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39
****************************************************************************/
void x86emuOp_genop_word_RM_R(u8 op1)
{
    int mod, rl, rh;
    uint destoffset;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\t");
    FETCH_DECODE_MODRM(mod, rh, rl);

    if(mod<3) {
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	destoffset = decode_rmXX_address(mod,rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 destval;
	    u32 *srcreg;

	    DECODE_PRINTF(",");
	    destval = fetch_data_long(destoffset);
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    destval = genop_long_operation[op1](destval, *srcreg);
	    store_data_long(destoffset, destval);
	} else {
	    u16 destval;
	    u16 *srcreg;

	    DECODE_PRINTF(",");
	    destval = fetch_data_word(destoffset);
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    destval = genop_word_operation[op1](destval, *srcreg);
	    store_data_word(destoffset, destval);
	}
    } else {			/* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg,*srcreg;

	    destreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = genop_long_operation[op1](*destreg, *srcreg);
	} else {
	    u16 *destreg,*srcreg;

	    destreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = genop_word_operation[op1](*destreg, *srcreg);
	}
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    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a
****************************************************************************/
void x86emuOp_genop_byte_R_RM(u8 op1)
{
    int mod, rl, rh;
    u8 *destreg, *srcreg;
    uint srcoffset;
    u8 srcval;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
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	destreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF(",");
	srcoffset = decode_rmXX_address(mod,rl);
	srcval = fetch_data_byte(srcoffset);
    } else {	 /* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rl);
	srcval = *srcreg;
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    }
    DECODE_PRINTF("\n");
    TRACE_AND_STEP();
    *destreg = genop_byte_operation[op1](*destreg, srcval);

    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x03, 0x0b, 0x13, 0x1b, 0x23, 0x2b, 0x33, 0x3b
****************************************************************************/
void x86emuOp_genop_word_R_RM(u8 op1)
{
    int mod, rl, rh;
    uint srcoffset;
    u32 *destreg32, srcval;
    u16 *destreg;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
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	srcoffset = decode_rmXX_address(mod,rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    destreg32 = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcval = fetch_data_long(srcoffset);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg32 = genop_long_operation[op1](*destreg32, srcval);
	} else {
	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcval = fetch_data_word(srcoffset);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = genop_word_operation[op1](*destreg, srcval);
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *srcreg;
	    destreg32 = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg32 = genop_long_operation[op1](*destreg32, *srcreg);
	} else {
	    u16 *srcreg;
	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = genop_word_operation[op1](*destreg, *srcreg);
	}
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    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x04, 0x0c, 0x14, 0x1c, 0x24, 0x2c, 0x34, 0x3c
****************************************************************************/
void x86emuOp_genop_byte_AL_IMM(u8 op1)
{
    u8 srcval;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\tAL,");
    srcval = fetch_byte_imm();
    DECODE_PRINTF2("%x\n", srcval);
    TRACE_AND_STEP();
    M.x86.R_AL = genop_byte_operation[op1](M.x86.R_AL, srcval);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x05, 0x0d, 0x15, 0x1d, 0x25, 0x2d, 0x35, 0x3d
****************************************************************************/
void x86emuOp_genop_word_AX_IMM(u8 op1)
{
    u32 srcval;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
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	DECODE_PRINTF(x86emu_GenOpName[op1]);
	DECODE_PRINTF("\tEAX,");
	srcval = fetch_long_imm();
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    } else {
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	DECODE_PRINTF(x86emu_GenOpName[op1]);
	DECODE_PRINTF("\tAX,");
	srcval = fetch_word_imm();
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    }
    DECODE_PRINTF2("%x\n", srcval);
    TRACE_AND_STEP();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
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	M.x86.R_EAX = genop_long_operation[op1](M.x86.R_EAX, srcval);
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    } else {
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	M.x86.R_AX = genop_word_operation[op1](M.x86.R_AX, (u16)srcval);
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    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x06
****************************************************************************/
void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("PUSH\tES\n");
    TRACE_AND_STEP();
    push_word(M.x86.R_ES);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x07
****************************************************************************/
void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("POP\tES\n");
    TRACE_AND_STEP();
    M.x86.R_ES = pop_word();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x0e
****************************************************************************/
void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("PUSH\tCS\n");
    TRACE_AND_STEP();
    push_word(M.x86.R_CS);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x0f. Escape for two-byte opcode (286 or better)
****************************************************************************/
void x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))
{
    u8 op2 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
    INC_DECODED_INST_LEN(1);
    (*x86emu_optab2[op2])(op2);
}

/****************************************************************************
REMARKS:
Handles opcode 0x16
****************************************************************************/
void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("PUSH\tSS\n");
    TRACE_AND_STEP();
    push_word(M.x86.R_SS);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x17
****************************************************************************/
void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("POP\tSS\n");
    TRACE_AND_STEP();
    M.x86.R_SS = pop_word();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x1e
****************************************************************************/
void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("PUSH\tDS\n");
    TRACE_AND_STEP();
    push_word(M.x86.R_DS);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x1f
****************************************************************************/
void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("POP\tDS\n");
    TRACE_AND_STEP();
    M.x86.R_DS = pop_word();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x26
****************************************************************************/
void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("ES:\n");
    TRACE_AND_STEP();
    M.x86.mode |= SYSMODE_SEGOVR_ES;
    /*
     * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
     * opcode subroutines we do not want to do this.
     */
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x27
****************************************************************************/
void x86emuOp_daa(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("DAA\n");
    TRACE_AND_STEP();
    M.x86.R_AL = daa_byte(M.x86.R_AL);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x2e
****************************************************************************/
void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("CS:\n");
    TRACE_AND_STEP();
    M.x86.mode |= SYSMODE_SEGOVR_CS;
    /* note no DECODE_CLEAR_SEGOVR here. */
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x2f
****************************************************************************/
void x86emuOp_das(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("DAS\n");
    TRACE_AND_STEP();
    M.x86.R_AL = das_byte(M.x86.R_AL);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x36
****************************************************************************/
void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("SS:\n");
    TRACE_AND_STEP();
    M.x86.mode |= SYSMODE_SEGOVR_SS;
    /* no DECODE_CLEAR_SEGOVR ! */
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x37
****************************************************************************/
void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("AAA\n");
    TRACE_AND_STEP();
    M.x86.R_AX = aaa_word(M.x86.R_AX);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x3e
****************************************************************************/
void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("DS:\n");
    TRACE_AND_STEP();
    M.x86.mode |= SYSMODE_SEGOVR_DS;
    /* NO DECODE_CLEAR_SEGOVR! */
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x3f
****************************************************************************/
void x86emuOp_aas(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("AAS\n");
    TRACE_AND_STEP();
    M.x86.R_AX = aas_word(M.x86.R_AX);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x40 - 0x47
****************************************************************************/
void x86emuOp_inc_register(u8 op1)
{
    START_OF_INSTR();
    op1 &= 0x7;
    DECODE_PRINTF("INC\t");
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
688 689 690 691 692
	u32 *reg;
	reg = DECODE_RM_LONG_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*reg = inc_long(*reg);
693
    } else {
694 695 696 697 698
	u16 *reg;
	reg = DECODE_RM_WORD_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*reg = inc_word(*reg);
699 700 701 702 703 704 705 706 707 708 709 710 711 712 713
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x48 - 0x4F
****************************************************************************/
void x86emuOp_dec_register(u8 op1)
{
    START_OF_INSTR();
    op1 &= 0x7;
    DECODE_PRINTF("DEC\t");
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
714 715 716 717 718
	u32 *reg;
	reg = DECODE_RM_LONG_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*reg = dec_long(*reg);
719
    } else {
720 721 722 723 724
	u16 *reg;
	reg = DECODE_RM_WORD_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*reg = dec_word(*reg);
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    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x50 - 0x57
****************************************************************************/
void x86emuOp_push_register(u8 op1)
{
    START_OF_INSTR();
    op1 &= 0x7;
    DECODE_PRINTF("PUSH\t");
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
740 741 742 743 744
	u32 *reg;
	reg = DECODE_RM_LONG_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	push_long(*reg);
745
    } else {
746 747 748 749 750
	u16 *reg;
	reg = DECODE_RM_WORD_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	push_word(*reg);
751 752 753 754 755 756 757 758 759 760 761 762 763 764 765
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x58 - 0x5F
****************************************************************************/
void x86emuOp_pop_register(u8 op1)
{
    START_OF_INSTR();
    op1 &= 0x7;
    DECODE_PRINTF("POP\t");
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
766 767 768 769 770
	u32 *reg;
	reg = DECODE_RM_LONG_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*reg = pop_long();
771
    } else {
772 773 774 775 776
	u16 *reg;
	reg = DECODE_RM_WORD_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*reg = pop_word();
777 778 779 780 781 782 783 784 785 786 787 788 789
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x60
****************************************************************************/
void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
790
	DECODE_PRINTF("PUSHAD\n");
791
    } else {
792
	DECODE_PRINTF("PUSHA\n");
793 794 795
    }
    TRACE_AND_STEP();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
796 797 798 799 800 801 802 803 804 805
	u32 old_sp = M.x86.R_ESP;

	push_long(M.x86.R_EAX);
	push_long(M.x86.R_ECX);
	push_long(M.x86.R_EDX);
	push_long(M.x86.R_EBX);
	push_long(old_sp);
	push_long(M.x86.R_EBP);
	push_long(M.x86.R_ESI);
	push_long(M.x86.R_EDI);
806
    } else {
807 808 809 810 811 812 813 814 815 816
	u16 old_sp = M.x86.R_SP;

	push_word(M.x86.R_AX);
	push_word(M.x86.R_CX);
	push_word(M.x86.R_DX);
	push_word(M.x86.R_BX);
	push_word(old_sp);
	push_word(M.x86.R_BP);
	push_word(M.x86.R_SI);
	push_word(M.x86.R_DI);
817 818 819 820 821 822 823 824 825 826 827 828 829
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x61
****************************************************************************/
void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
830
	DECODE_PRINTF("POPAD\n");
831
    } else {
832
	DECODE_PRINTF("POPA\n");
833 834 835
    }
    TRACE_AND_STEP();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
836 837 838 839 840 841 842 843
	M.x86.R_EDI = pop_long();
	M.x86.R_ESI = pop_long();
	M.x86.R_EBP = pop_long();
	M.x86.R_ESP += 4;	       /* skip ESP */
	M.x86.R_EBX = pop_long();
	M.x86.R_EDX = pop_long();
	M.x86.R_ECX = pop_long();
	M.x86.R_EAX = pop_long();
844
    } else {
845 846 847 848 849 850 851 852
	M.x86.R_DI = pop_word();
	M.x86.R_SI = pop_word();
	M.x86.R_BP = pop_word();
	M.x86.R_SP += 2;	       /* skip SP */
	M.x86.R_BX = pop_word();
	M.x86.R_DX = pop_word();
	M.x86.R_CX = pop_word();
	M.x86.R_AX = pop_word();
853 854 855 856 857
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

858 859
/*opcode 0x62	ILLEGAL OP, calls x86emuOp_illegal_op() */
/*opcode 0x63	ILLEGAL OP, calls x86emuOp_illegal_op() */
860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932

/****************************************************************************
REMARKS:
Handles opcode 0x64
****************************************************************************/
void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("FS:\n");
    TRACE_AND_STEP();
    M.x86.mode |= SYSMODE_SEGOVR_FS;
    /*
     * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
     * opcode subroutines we do not want to do this.
     */
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x65
****************************************************************************/
void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("GS:\n");
    TRACE_AND_STEP();
    M.x86.mode |= SYSMODE_SEGOVR_GS;
    /*
     * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
     * opcode subroutines we do not want to do this.
     */
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x66 - prefix for 32-bit register
****************************************************************************/
void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("DATA:\n");
    TRACE_AND_STEP();
    M.x86.mode |= SYSMODE_PREFIX_DATA;
    /* note no DECODE_CLEAR_SEGOVR here. */
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x67 - prefix for 32-bit address
****************************************************************************/
void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("ADDR:\n");
    TRACE_AND_STEP();
    M.x86.mode |= SYSMODE_PREFIX_ADDR;
    /* note no DECODE_CLEAR_SEGOVR here. */
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x68
****************************************************************************/
void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
{
    u32 imm;

    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
933
	imm = fetch_long_imm();
934
    } else {
935
	imm = fetch_word_imm();
936 937 938 939
    }
    DECODE_PRINTF2("PUSH\t%x\n", imm);
    TRACE_AND_STEP();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
940
	push_long(imm);
941
    } else {
942
	push_word((u16)imm);
943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x69
****************************************************************************/
void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint srcoffset;

    START_OF_INSTR();
    DECODE_PRINTF("IMUL\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049
	srcoffset = decode_rmXX_address(mod, rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg;
	    u32 srcval;
	    u32 res_lo,res_hi;
	    s32 imm;

	    destreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcval = fetch_data_long(srcoffset);
	    imm = fetch_long_imm();
	    DECODE_PRINTF2(",%d\n", (s32)imm);
	    TRACE_AND_STEP();
	    imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
	    if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
		(((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
		CLEAR_FLAG(F_CF);
		CLEAR_FLAG(F_OF);
	    } else {
		SET_FLAG(F_CF);
		SET_FLAG(F_OF);
	    }
	    *destreg = (u32)res_lo;
	} else {
	    u16 *destreg;
	    u16 srcval;
	    u32 res;
	    s16 imm;

	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcval = fetch_data_word(srcoffset);
	    imm = fetch_word_imm();
	    DECODE_PRINTF2(",%d\n", (s32)imm);
	    TRACE_AND_STEP();
	    res = (s16)srcval * (s16)imm;
	    if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
		(((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
		CLEAR_FLAG(F_CF);
		CLEAR_FLAG(F_OF);
	    } else {
		SET_FLAG(F_CF);
		SET_FLAG(F_OF);
	    }
	    *destreg = (u16)res;
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg,*srcreg;
	    u32 res_lo,res_hi;
	    s32 imm;

	    destreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rl);
	    imm = fetch_long_imm();
	    DECODE_PRINTF2(",%d\n", (s32)imm);
	    TRACE_AND_STEP();
	    imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
	    if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
		(((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
		CLEAR_FLAG(F_CF);
		CLEAR_FLAG(F_OF);
	    } else {
		SET_FLAG(F_CF);
		SET_FLAG(F_OF);
	    }
	    *destreg = (u32)res_lo;
	} else {
	    u16 *destreg,*srcreg;
	    u32 res;
	    s16 imm;

	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rl);
	    imm = fetch_word_imm();
	    DECODE_PRINTF2(",%d\n", (s32)imm);
	    res = (s16)*srcreg * (s16)imm;
	    if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
		(((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
		CLEAR_FLAG(F_CF);
		CLEAR_FLAG(F_OF);
	    } else {
		SET_FLAG(F_CF);
		SET_FLAG(F_OF);
	    }
	    *destreg = (u16)res;
	}
1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x6a
****************************************************************************/
void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
{
    s16 imm;

    START_OF_INSTR();
    imm = (s8)fetch_byte_imm();
    DECODE_PRINTF2("PUSH\t%d\n", imm);
    TRACE_AND_STEP();
    push_word(imm);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x6b
****************************************************************************/
void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint srcoffset;
1080
    s8	imm;
1081 1082 1083 1084 1085

    START_OF_INSTR();
    DECODE_PRINTF("IMUL\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171
	srcoffset = decode_rmXX_address(mod, rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg;
	    u32 srcval;
	    u32 res_lo,res_hi;

	    destreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcval = fetch_data_long(srcoffset);
	    imm = fetch_byte_imm();
	    DECODE_PRINTF2(",%d\n", (s32)imm);
	    TRACE_AND_STEP();
	    imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
	    if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
		(((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
		CLEAR_FLAG(F_CF);
		CLEAR_FLAG(F_OF);
	    } else {
		SET_FLAG(F_CF);
		SET_FLAG(F_OF);
	    }
	    *destreg = (u32)res_lo;
	} else {
	    u16 *destreg;
	    u16 srcval;
	    u32 res;

	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcval = fetch_data_word(srcoffset);
	    imm = fetch_byte_imm();
	    DECODE_PRINTF2(",%d\n", (s32)imm);
	    TRACE_AND_STEP();
	    res = (s16)srcval * (s16)imm;
	    if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
		(((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
		CLEAR_FLAG(F_CF);
		CLEAR_FLAG(F_OF);
	    } else {
		SET_FLAG(F_CF);
		SET_FLAG(F_OF);
	    }
	    *destreg = (u16)res;
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg,*srcreg;
	    u32 res_lo,res_hi;

	    destreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rl);
	    imm = fetch_byte_imm();
	    DECODE_PRINTF2(",%d\n", (s32)imm);
	    TRACE_AND_STEP();
	    imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
	    if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
		(((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
		CLEAR_FLAG(F_CF);
		CLEAR_FLAG(F_OF);
	    } else {
		SET_FLAG(F_CF);
		SET_FLAG(F_OF);
	    }
	    *destreg = (u32)res_lo;
	} else {
	    u16 *destreg,*srcreg;
	    u32 res;

	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rl);
	    imm = fetch_byte_imm();
	    DECODE_PRINTF2(",%d\n", (s32)imm);
	    TRACE_AND_STEP();
	    res = (s16)*srcreg * (s16)imm;
	    if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
		(((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
		CLEAR_FLAG(F_CF);
		CLEAR_FLAG(F_OF);
	    } else {
		SET_FLAG(F_CF);
		SET_FLAG(F_OF);
	    }
	    *destreg = (u16)res;
	}
1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x6c
****************************************************************************/
void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("INSB\n");
    ins(1);
    TRACE_AND_STEP();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x6d
****************************************************************************/
void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
1199 1200
	DECODE_PRINTF("INSD\n");
	ins(4);
1201
    } else {
1202 1203
	DECODE_PRINTF("INSW\n");
	ins(2);
1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231
    }
    TRACE_AND_STEP();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x6e
****************************************************************************/
void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("OUTSB\n");
    outs(1);
    TRACE_AND_STEP();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x6f
****************************************************************************/
void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
1232 1233
	DECODE_PRINTF("OUTSD\n");
	outs(4);
1234
    } else {
1235 1236
	DECODE_PRINTF("OUTSW\n");
	outs(2);
1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262
    }
    TRACE_AND_STEP();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x70 - 0x7F
****************************************************************************/
int x86emu_check_jump_condition(u8 op);

void x86emuOp_jump_near_cond(u8 op1)
{
    s8 offset;
    u16 target;
    int cond;

    /* jump to byte offset if overflow flag is set */
    START_OF_INSTR();
    cond = x86emu_check_jump_condition(op1 & 0xF);
    offset = (s8)fetch_byte_imm();
    target = (u16)(M.x86.R_IP + (s16)offset);
    DECODE_PRINTF2("%x\n", target);
    TRACE_AND_STEP();
    if (cond)
1263
	M.x86.R_IP = target;
1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x80
****************************************************************************/
void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u8 *destreg;
    uint destoffset;
    u8 imm;
    u8 destval;

    /*
1281
     * Weirdo special case instruction format.	Part of the opcode
1282 1283 1284 1285 1286 1287 1288
     * held below in "RH".  Doubly nested case would result, except
     * that the decoded instruction
     */
    START_OF_INSTR();
    FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG
    if (DEBUG_DECODE()) {
1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319
	/* XXX DECODE_PRINTF may be changed to something more
	   general, so that it is important to leave the strings
	   in the same format, even though the result is that the
	   above test is done twice. */

	switch (rh) {
	case 0:
	    DECODE_PRINTF("ADD\t");
	    break;
	case 1:
	    DECODE_PRINTF("OR\t");
	    break;
	case 2:
	    DECODE_PRINTF("ADC\t");
	    break;
	case 3:
	    DECODE_PRINTF("SBB\t");
	    break;
	case 4:
	    DECODE_PRINTF("AND\t");
	    break;
	case 5:
	    DECODE_PRINTF("SUB\t");
	    break;
	case 6:
	    DECODE_PRINTF("XOR\t");
	    break;
	case 7:
	    DECODE_PRINTF("CMP\t");
	    break;
	}
1320 1321 1322 1323 1324
    }
#endif
    /* know operation, decode the mod byte to find the addressing
       mode. */
    if (mod < 3) {
1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343
	DECODE_PRINTF("BYTE PTR ");
	destoffset = decode_rmXX_address(mod, rl);
	DECODE_PRINTF(",");
	destval = fetch_data_byte(destoffset);
	imm = fetch_byte_imm();
	DECODE_PRINTF2("%x\n", imm);
	TRACE_AND_STEP();
	destval = (*genop_byte_operation[rh]) (destval, imm);
	if (rh != 7)
	    store_data_byte(destoffset, destval);
    } else {			 /* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rl);
	DECODE_PRINTF(",");
	imm = fetch_byte_imm();
	DECODE_PRINTF2("%x\n", imm);
	TRACE_AND_STEP();
	destval = (*genop_byte_operation[rh]) (*destreg, imm);
	if (rh != 7)
	    *destreg = destval;
1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x81
****************************************************************************/
void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint destoffset;

    /*
1359
     * Weirdo special case instruction format.	Part of the opcode
1360 1361 1362 1363 1364 1365 1366
     * held below in "RH".  Doubly nested case would result, except
     * that the decoded instruction
     */
    START_OF_INSTR();
    FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG
    if (DEBUG_DECODE()) {
1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397
	/* XXX DECODE_PRINTF may be changed to something more
	   general, so that it is important to leave the strings
	   in the same format, even though the result is that the
	   above test is done twice. */

	switch (rh) {
	case 0:
	    DECODE_PRINTF("ADD\t");
	    break;
	case 1:
	    DECODE_PRINTF("OR\t");
	    break;
	case 2:
	    DECODE_PRINTF("ADC\t");
	    break;
	case 3:
	    DECODE_PRINTF("SBB\t");
	    break;
	case 4:
	    DECODE_PRINTF("AND\t");
	    break;
	case 5:
	    DECODE_PRINTF("SUB\t");
	    break;
	case 6:
	    DECODE_PRINTF("XOR\t");
	    break;
	case 7:
	    DECODE_PRINTF("CMP\t");
	    break;
	}
1398 1399 1400 1401 1402 1403 1404
    }
#endif
    /*
     * Know operation, decode the mod byte to find the addressing
     * mode.
     */
    if (mod < 3) {
1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455
	DECODE_PRINTF("DWORD PTR ");
	destoffset = decode_rmXX_address(mod, rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 destval,imm;

	    DECODE_PRINTF(",");
	    destval = fetch_data_long(destoffset);
	    imm = fetch_long_imm();
	    DECODE_PRINTF2("%x\n", imm);
	    TRACE_AND_STEP();
	    destval = (*genop_long_operation[rh]) (destval, imm);
	    if (rh != 7)
		store_data_long(destoffset, destval);
	} else {
	    u16 destval,imm;

	    DECODE_PRINTF(",");
	    destval = fetch_data_word(destoffset);
	    imm = fetch_word_imm();
	    DECODE_PRINTF2("%x\n", imm);
	    TRACE_AND_STEP();
	    destval = (*genop_word_operation[rh]) (destval, imm);
	    if (rh != 7)
		store_data_word(destoffset, destval);
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg;
	    u32 destval,imm;

	    destreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF(",");
	    imm = fetch_long_imm();
	    DECODE_PRINTF2("%x\n", imm);
	    TRACE_AND_STEP();
	    destval = (*genop_long_operation[rh]) (*destreg, imm);
	    if (rh != 7)
		*destreg = destval;
	} else {
	    u16 *destreg;
	    u16 destval,imm;

	    destreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF(",");
	    imm = fetch_word_imm();
	    DECODE_PRINTF2("%x\n", imm);
	    TRACE_AND_STEP();
	    destval = (*genop_word_operation[rh]) (*destreg, imm);
	    if (rh != 7)
		*destreg = destval;
	}
1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x82
****************************************************************************/
void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u8 *destreg;
    uint destoffset;
    u8 imm;
    u8 destval;

    /*
1474
     * Weirdo special case instruction format.	Part of the opcode
1475 1476 1477 1478 1479 1480 1481 1482
     * held below in "RH".  Doubly nested case would result, except
     * that the decoded instruction Similar to opcode 81, except that
     * the immediate byte is sign extended to a word length.
     */
    START_OF_INSTR();
    FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG
    if (DEBUG_DECODE()) {
1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512
	/* XXX DECODE_PRINTF may be changed to something more
	   general, so that it is important to leave the strings
	   in the same format, even though the result is that the
	   above test is done twice. */
	switch (rh) {
	case 0:
	    DECODE_PRINTF("ADD\t");
	    break;
	case 1:
	    DECODE_PRINTF("OR\t");
	    break;
	case 2:
	    DECODE_PRINTF("ADC\t");
	    break;
	case 3:
	    DECODE_PRINTF("SBB\t");
	    break;
	case 4:
	    DECODE_PRINTF("AND\t");
	    break;
	case 5:
	    DECODE_PRINTF("SUB\t");
	    break;
	case 6:
	    DECODE_PRINTF("XOR\t");
	    break;
	case 7:
	    DECODE_PRINTF("CMP\t");
	    break;
	}
1513 1514 1515 1516 1517
    }
#endif
    /* know operation, decode the mod byte to find the addressing
       mode. */
    if (mod < 3) {
1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534
	DECODE_PRINTF("BYTE PTR ");
	destoffset = decode_rmXX_address(mod, rl);
	destval = fetch_data_byte(destoffset);
	imm = fetch_byte_imm();
	DECODE_PRINTF2(",%x\n", imm);
	TRACE_AND_STEP();
	destval = (*genop_byte_operation[rh]) (destval, imm);
	if (rh != 7)
	    store_data_byte(destoffset, destval);
    } else {			 /* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rl);
	imm = fetch_byte_imm();
	DECODE_PRINTF2(",%x\n", imm);
	TRACE_AND_STEP();
	destval = (*genop_byte_operation[rh]) (*destreg, imm);
	if (rh != 7)
	    *destreg = destval;
1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x83
****************************************************************************/
void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint destoffset;

    /*
1550
     * Weirdo special case instruction format.	Part of the opcode
1551 1552 1553 1554 1555 1556 1557 1558
     * held below in "RH".  Doubly nested case would result, except
     * that the decoded instruction Similar to opcode 81, except that
     * the immediate byte is sign extended to a word length.
     */
    START_OF_INSTR();
    FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG
    if (DEBUG_DECODE()) {
1559 1560 1561 1562
	/* XXX DECODE_PRINTF may be changed to something more
	   general, so that it is important to leave the strings
	   in the same format, even though the result is that the
	   above test is done twice. */
1563
       switch (rh) {
1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588
	case 0:
	    DECODE_PRINTF("ADD\t");
	    break;
	case 1:
	    DECODE_PRINTF("OR\t");
	    break;
	case 2:
	    DECODE_PRINTF("ADC\t");
	    break;
	case 3:
	    DECODE_PRINTF("SBB\t");
	    break;
	case 4:
	    DECODE_PRINTF("AND\t");
	    break;
	case 5:
	    DECODE_PRINTF("SUB\t");
	    break;
	case 6:
	    DECODE_PRINTF("XOR\t");
	    break;
	case 7:
	    DECODE_PRINTF("CMP\t");
	    break;
	}
1589 1590 1591 1592 1593
    }
#endif
    /* know operation, decode the mod byte to find the addressing
       mode. */
    if (mod < 3) {
1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641
	DECODE_PRINTF("DWORD PTR ");
	destoffset = decode_rmXX_address(mod,rl);

	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 destval,imm;

	    destval = fetch_data_long(destoffset);
	    imm = (s8) fetch_byte_imm();
	    DECODE_PRINTF2(",%x\n", imm);
	    TRACE_AND_STEP();
	    destval = (*genop_long_operation[rh]) (destval, imm);
	    if (rh != 7)
		store_data_long(destoffset, destval);
	} else {
	    u16 destval,imm;

	    destval = fetch_data_word(destoffset);
	    imm = (s8) fetch_byte_imm();
	    DECODE_PRINTF2(",%x\n", imm);
	    TRACE_AND_STEP();
	    destval = (*genop_word_operation[rh]) (destval, imm);
	    if (rh != 7)
		store_data_word(destoffset, destval);
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg;
	    u32 destval,imm;

	    destreg = DECODE_RM_LONG_REGISTER(rl);
	    imm = (s8) fetch_byte_imm();
	    DECODE_PRINTF2(",%x\n", imm);
	    TRACE_AND_STEP();
	    destval = (*genop_long_operation[rh]) (*destreg, imm);
	    if (rh != 7)
		*destreg = destval;
	} else {
	    u16 *destreg;
	    u16 destval,imm;

	    destreg = DECODE_RM_WORD_REGISTER(rl);
	    imm = (s8) fetch_byte_imm();
	    DECODE_PRINTF2(",%x\n", imm);
	    TRACE_AND_STEP();
	    destval = (*genop_word_operation[rh]) (*destreg, imm);
	    if (rh != 7)
		*destreg = destval;
	}
1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x84
****************************************************************************/
void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u8 *destreg, *srcreg;
    uint destoffset;
    u8 destval;

    START_OF_INSTR();
    DECODE_PRINTF("TEST\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675
	destoffset = decode_rmXX_address(mod, rl);
	DECODE_PRINTF(",");
	destval = fetch_data_byte(destoffset);
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	test_byte(destval, *srcreg);
    } else {			 /* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rl);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	test_byte(*destreg, *srcreg);
1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x85
****************************************************************************/
void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint destoffset;

    START_OF_INSTR();
    DECODE_PRINTF("TEST\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735
	destoffset = decode_rmXX_address(mod, rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 destval;
	    u32 *srcreg;

	    DECODE_PRINTF(",");
	    destval = fetch_data_long(destoffset);
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    test_long(destval, *srcreg);
	} else {
	    u16 destval;
	    u16 *srcreg;

	    DECODE_PRINTF(",");
	    destval = fetch_data_word(destoffset);
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    test_word(destval, *srcreg);
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg,*srcreg;

	    destreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    test_long(*destreg, *srcreg);
	} else {
	    u16 *destreg,*srcreg;

	    destreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    test_word(*destreg, *srcreg);
	}
1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x86
****************************************************************************/
void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u8 *destreg, *srcreg;
    uint destoffset;
    u8 destval;
    u8 tmp;

    START_OF_INSTR();
    DECODE_PRINTF("XCHG\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775
	destoffset = decode_rmXX_address(mod, rl);
	DECODE_PRINTF(",");
	destval = fetch_data_byte(destoffset);
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	tmp = *srcreg;
	*srcreg = destval;
	destval = tmp;
	store_data_byte(destoffset, destval);
    } else {			 /* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rl);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	tmp = *srcreg;
	*srcreg = *destreg;
	*destreg = tmp;
1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x87
****************************************************************************/
void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint destoffset;

    START_OF_INSTR();
    DECODE_PRINTF("XCHG\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846
	destoffset = decode_rmXX_address(mod, rl);
	DECODE_PRINTF(",");
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *srcreg;
	    u32 destval,tmp;

	    destval = fetch_data_long(destoffset);
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    tmp = *srcreg;
	    *srcreg = destval;
	    destval = tmp;
	    store_data_long(destoffset, destval);
	} else {
	    u16 *srcreg;
	    u16 destval,tmp;

	    destval = fetch_data_word(destoffset);
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    tmp = *srcreg;
	    *srcreg = destval;
	    destval = tmp;
	    store_data_word(destoffset, destval);
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg,*srcreg;
	    u32 tmp;

	    destreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    tmp = *srcreg;
	    *srcreg = *destreg;
	    *destreg = tmp;
	} else {
	    u16 *destreg,*srcreg;
	    u16 tmp;

	    destreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    tmp = *srcreg;
	    *srcreg = *destreg;
	    *destreg = tmp;
	}
1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x88
****************************************************************************/
void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u8 *destreg, *srcreg;
    uint destoffset;

    START_OF_INSTR();
    DECODE_PRINTF("MOV\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878
	destoffset = decode_rmXX_address(mod, rl);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	store_data_byte(destoffset, *srcreg);
    } else {			 /* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rl);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*destreg = *srcreg;
1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x89
****************************************************************************/
void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint destoffset;

    START_OF_INSTR();
    DECODE_PRINTF("MOV\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934
	destoffset = decode_rmXX_address(mod, rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *srcreg;

	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    store_data_long(destoffset, *srcreg);
	} else {
	    u16 *srcreg;

	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    store_data_word(destoffset, *srcreg);
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg,*srcreg;

	    destreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = *srcreg;
	} else {
	    u16 *destreg,*srcreg;

	    destreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = *srcreg;
	}
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    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x8a
****************************************************************************/
void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u8 *destreg, *srcreg;
    uint srcoffset;
    u8 srcval;

    START_OF_INSTR();
    DECODE_PRINTF("MOV\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
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	destreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF(",");
	srcoffset = decode_rmXX_address(mod, rl);
	srcval = fetch_data_byte(srcoffset);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*destreg = srcval;
    } else {			 /* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rl);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*destreg = *srcreg;
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    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x8b
****************************************************************************/
void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint srcoffset;

    START_OF_INSTR();
    DECODE_PRINTF("MOV\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg;
	    u32 srcval;

	    destreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcoffset = decode_rmXX_address(mod, rl);
	    srcval = fetch_data_long(srcoffset);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = srcval;
	} else {
	    u16 *destreg;
	    u16 srcval;

	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcoffset = decode_rmXX_address(mod, rl);
	    srcval = fetch_data_word(srcoffset);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = srcval;
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg, *srcreg;

	    destreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = *srcreg;
	} else {
	    u16 *destreg, *srcreg;

	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = *srcreg;
	}
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    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x8c
****************************************************************************/
void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u16 *destreg, *srcreg;
    uint destoffset;
    u16 destval;

    START_OF_INSTR();
    DECODE_PRINTF("MOV\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
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	destoffset = decode_rmXX_address(mod, rl);
	DECODE_PRINTF(",");
	srcreg = decode_rm_seg_register(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	destval = *srcreg;
	store_data_word(destoffset, destval);
    } else {			 /* register to register */
	destreg = DECODE_RM_WORD_REGISTER(rl);
	DECODE_PRINTF(",");
	srcreg = decode_rm_seg_register(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*destreg = *srcreg;
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    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x8d
****************************************************************************/
void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u16 *srcreg;
    uint destoffset;

/*
 * TODO: Need to handle address size prefix!
 *
2082
 * lea	eax,[eax+ebx*2] ??
2083 2084 2085 2086 2087 2088
 */

    START_OF_INSTR();
    DECODE_PRINTF("LEA\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
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	srcreg = DECODE_RM_WORD_REGISTER(rh);
	DECODE_PRINTF(",");
	destoffset = decode_rmXX_address(mod, rl);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*srcreg = (u16)destoffset;
	}
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    /* } else { undefined.  Do nothing. } */
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x8e
****************************************************************************/
void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    u16 *destreg, *srcreg;
    uint srcoffset;
    u16 srcval;

    START_OF_INSTR();
    DECODE_PRINTF("MOV\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
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	destreg = decode_rm_seg_register(rh);
	DECODE_PRINTF(",");
	srcoffset = decode_rmXX_address(mod, rl);
	srcval = fetch_data_word(srcoffset);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*destreg = srcval;
    } else {			 /* register to register */
	destreg = decode_rm_seg_register(rh);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_WORD_REGISTER(rl);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*destreg = *srcreg;
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    }
    /*
     * Clean up, and reset all the R_xSP pointers to the correct
     * locations.  This is about 3x too much overhead (doing all the
     * segreg ptrs when only one is needed, but this instruction
     * *cannot* be that common, and this isn't too much work anyway.
     */
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x8f
****************************************************************************/
void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
{
    int mod, rl, rh;
    uint destoffset;

    START_OF_INSTR();
    DECODE_PRINTF("POP\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (rh != 0) {
2154 2155
	DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
	HALT_SYS();
2156 2157
    }
    if (mod < 3) {
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	destoffset = decode_rmXX_address(mod, rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 destval;

	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    destval = pop_long();
	    store_data_long(destoffset, destval);
	} else {
	    u16 destval;

	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    destval = pop_word();
	    store_data_word(destoffset, destval);
	}
    } else {			/* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg;

	    destreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = pop_long();
	} else {
	    u16 *destreg;

	    destreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = pop_word();
	}
2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x90
****************************************************************************/
void x86emuOp_nop(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("NOP\n");
    TRACE_AND_STEP();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x91-0x97
****************************************************************************/
void x86emuOp_xchg_word_AX_register(u8 X86EMU_UNUSED(op1))
{
    u32 tmp;

    op1 &= 0x7;

    START_OF_INSTR();

    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
2221 2222 2223 2224 2225 2226 2227 2228
	u32 *reg32;
	DECODE_PRINTF("XCHG\tEAX,");
	reg32 = DECODE_RM_LONG_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	tmp = M.x86.R_EAX;
	M.x86.R_EAX = *reg32;
	*reg32 = tmp;
2229
    } else {
2230 2231 2232 2233 2234 2235 2236 2237
	u16 *reg16;
	DECODE_PRINTF("XCHG\tAX,");
	reg16 = DECODE_RM_WORD_REGISTER(op1);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	tmp = M.x86.R_AX;
	M.x86.R_EAX = *reg16;
	*reg16 = (u16)tmp;
2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x98
****************************************************************************/
void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
2251
	DECODE_PRINTF("CWDE\n");
2252
    } else {
2253
	DECODE_PRINTF("CBW\n");
2254 2255 2256
    }
    TRACE_AND_STEP();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
2257 2258 2259 2260 2261
	if (M.x86.R_AX & 0x8000) {
	    M.x86.R_EAX |= 0xffff0000;
	} else {
	    M.x86.R_EAX &= 0x0000ffff;
	}
2262
    } else {
2263 2264 2265 2266 2267
	if (M.x86.R_AL & 0x80) {
	    M.x86.R_AH = 0xff;
	} else {
	    M.x86.R_AH = 0x0;
	}
2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x99
****************************************************************************/
void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
2281
	DECODE_PRINTF("CDQ\n");
2282
    } else {
2283
	DECODE_PRINTF("CWD\n");
2284 2285 2286 2287
    }
    DECODE_PRINTF("CWD\n");
    TRACE_AND_STEP();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
2288 2289 2290 2291 2292
	if (M.x86.R_EAX & 0x80000000) {
	    M.x86.R_EDX = 0xffffffff;
	} else {
	    M.x86.R_EDX = 0x0;
	}
2293
    } else {
2294 2295 2296 2297 2298
	if (M.x86.R_AX & 0x8000) {
	    M.x86.R_DX = 0xffff;
	} else {
	    M.x86.R_DX = 0x0;
	}
2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x9a
****************************************************************************/
void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
{
    u16 farseg, faroff;

    START_OF_INSTR();
	DECODE_PRINTF("CALL\t");
	faroff = fetch_word_imm();
	farseg = fetch_word_imm();
	DECODE_PRINTF2("%04x:", farseg);
	DECODE_PRINTF2("%04x\n", faroff);
	CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR ");

    /* XXX
     *
     * Hooked interrupt vectors calling into our "BIOS" will cause
     * problems unless all intersegment stuff is checked for BIOS
2324
     * access.	Check needed here.  For moment, let it alone.
2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345