socfpga_sr1500_defconfig 583 Bytes
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CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_SR1500=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
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CONFIG_FIT=y
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# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_DWAPB_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
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CONFIG_CADENCE_QSPI=y