AP1000.h 7.67 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
/*
 * AMIRIX.h: AMIRIX specific config options
 *
 * Author : Frank Smith (smith at amirix dot com)
 *
 * Derived from : other configuration header files in this tree
 *
 * This software may be used and distributed according to the terms of
 * the GNU General Public License (GPL) version 2, incorporated herein by
 * reference. Drivers based on or derived from this code fall under the GPL
 * and must retain the authorship, copyright and this license notice. This
 * file is not a complete program and may only be used when the entire
 * program is licensed under the GPL.
 *
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */

#undef DEBUG

27 28
#define CONFIG_405	1		/* This is a PPC405 CPU	    */
#define CONFIG_4xx	1		/* ...member of PPC4xx family	*/
29

30
#define CONFIG_AP1000	1		/* ...on an AP1000 board    */
31

32
#define CONFIG_PCI	1
33

34 35
#define CFG_HUSH_PARSER 1		/* use "hush" command parser	*/
#define CFG_PROMPT		"0> "
36 37
#define CFG_PROMPT_HUSH_PS2	"> "

38 39
#define CONFIG_COMMAND_EDIT	1
#define CONFIG_COMMAND_HISTORY	1
40 41
#define CONFIG_COMPLETE_ADDRESSES 1

42
#define CFG_ENV_IS_IN_FLASH	1
43 44 45 46 47 48 49 50 51 52
#define CFG_FLASH_USE_BUFFER_WRITE

#ifdef CFG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_FLASH
#else
#ifdef CFG_ENV_IS_IN_FLASH
#undef CFG_ENV_IS_IN_NVRAM
#endif
#endif

53 54
#define CONFIG_BAUDRATE		57600
#define CONFIG_BOOTDELAY	3	/* autoboot after 3 seconds */
55

56
#define CONFIG_BOOTCOMMAND	""	/* autoboot command */
57 58 59 60 61

/* Size (bytes) of interrupt driven serial port buffer.
 * Set to 0 to use polling instead of interrupts.
 * Setting to 0 will also disable RTS/CTS handshaking.
 */
62
#undef	CONFIG_SERIAL_SOFTWARE_FIFO
63

64
#define CONFIG_BOOTARGS		"console=ttyS0,57600"
65

66 67
#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/
68

69 70 71 72 73 74 75 76
#define CONFIG_COMMANDS	       (CONFIG_CMD_DFL	| \
				CFG_CMD_ASKENV	| \
				CFG_CMD_DHCP	| \
				CFG_CMD_ELF	| \
				CFG_CMD_IRQ	| \
				CFG_CMD_MVENV	| \
				CFG_CMD_PCI	| \
				CFG_CMD_PING	\
77
			       )
78 79 80 81

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

82
#undef CONFIG_WATCHDOG			/* watchdog disabled	    */
83

84
#define CONFIG_SYS_CLK_FREQ	30000000
85

86
#define CONFIG_SPD_EEPROM	1	/* use SPD EEPROM for setup    */
87 88 89 90

/*
 * Miscellaneous configurable options
 */
91
#define CFG_LONGHELP			/* undef to save memory	    */
92
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
93
#define CFG_CBSIZE	1024		/* Console I/O Buffer Size  */
94
#else
95
#define CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
96 97
#endif
/* usually: (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) */
98 99 100
#define CFG_PBSIZE	(CFG_CBSIZE+4+16)	/* Print Buffer Size */
#define CFG_MAXARGS	16		/* max number of command args	*/
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/
101

102 103 104
#define CFG_ALT_MEMTEST		1
#define CFG_MEMTEST_START	0x00400000	/* memtest works on */
#define CFG_MEMTEST_END		0x01000000	/* 4 ... 16 MB in DRAM	*/
105 106 107 108 109 110 111 112 113 114

/*
 * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
 * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
 * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
 * The Linux BASE_BAUD define should match this configuration.
 *    baseBaud = cpuClock/(uartDivisor*16)
 * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
 * set Linux BASE_BAUD to 403200.
 */
115 116 117 118 119 120 121 122 123 124 125
#undef	CFG_EXT_SERIAL_CLOCK		/* external serial clock */
#undef	CFG_405_UART_ERRATA_59		/* 405GP/CR Rev. D silicon */

#define CFG_NS16550_CLK		40000000
#define CFG_DUART_CHAN		0
#define CFG_NS16550_COM1	(0x4C000000 + 0x1000)
#define CFG_NS16550_COM2	(0x4C800000 + 0x1000)
#define CFG_NS16550_REG_SIZE	4
#define CFG_NS16550		1
#define CFG_INIT_CHAN1		1
#define CFG_INIT_CHAN2		0
126 127 128 129 130

/* The following table includes the supported baudrates */
#define CFG_BAUDRATE_TABLE  \
    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

131 132
#define CFG_LOAD_ADDR		0x00200000	/* default load address */
#define CFG_EXTBDINFO		1		/* To use extended board_into (bd_t) */
133

134
#define CFG_HZ			1000		/* decrementer freq: 1 ms ticks */
135 136 137 138 139 140

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
141 142 143 144 145
#define CFG_SDRAM_BASE		0x00000000
#define CFG_FLASH_BASE		0x20000000
#define CFG_MONITOR_BASE	TEXT_BASE
#define CFG_MONITOR_LEN		(192 * 1024)	/* Reserve 196 kB for Monitor	*/
#define CFG_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/
146 147 148 149 150 151

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
152
#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
153 154 155
/*-----------------------------------------------------------------------
 * FLASH organization
 */
156 157 158
#define CFG_FLASH_CFI		1
#define CFG_PROGFLASH_BASE	CFG_FLASH_BASE
#define CFG_CONFFLASH_BASE	0x24000000
159

160 161
#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks	    */
#define CFG_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/
162

163
#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)  */
164
#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
165

166
#define CFG_FLASH_PROTECTION	1	/* use hardware protection	    */
167 168 169

/* BEG ENVIRONNEMENT FLASH */
#ifdef CFG_ENV_IS_IN_FLASH
170 171 172
#define CFG_ENV_OFFSET		0x00040000 /* Offset of Environment Sector	*/
#define CFG_ENV_SIZE		0x1000	/* Total Size of Environment Sector */
#define CFG_ENV_SECT_SIZE	0x20000 /* see README - env sector total size	*/
173 174 175 176 177
#endif
/* END ENVIRONNEMENT FLASH */
/*-----------------------------------------------------------------------
 * NVRAM organization
 */
178 179
#define CFG_NVRAM_BASE_ADDR	0xf0000000	/* NVRAM base address	*/
#define CFG_NVRAM_SIZE		0x1ff8		/* NVRAM size	*/
180 181

#ifdef CFG_ENV_IS_IN_NVRAM
182
#define CFG_ENV_SIZE		0x1000		/* Size of Environment vars */
183 184
#define CFG_ENV_ADDR	    \
    (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE)	/* Env	*/
185 186 187 188
#endif
/*-----------------------------------------------------------------------
 * Cache Configuration
 */
189 190
#define CFG_DCACHE_SIZE		16384
#define CFG_CACHELINE_SIZE	32
191
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
192
#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value    */
193 194 195 196 197 198 199 200
#endif

/*
 * Init Memory Controller:
 *
 * BR0/1 and OR0/1 (FLASH)
 */

201 202
#define FLASH_BASE0_PRELIM	CFG_FLASH_BASE	/* FLASH bank #0	*/
#define FLASH_BASE1_PRELIM	0		/* FLASH bank #1	*/
203 204

/* Configuration Port location */
205
#define CONFIG_PORT_ADDR	0xF0000500
206 207 208 209 210

/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area (in DPRAM)
 */

211 212
#define CFG_INIT_RAM_ADDR	0x400000  /* inside of SDRAM			 */
#define CFG_INIT_RAM_END	0x2000	/* End of used area in RAM	       */
213 214
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
215
#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
216 217 218 219 220

/*-----------------------------------------------------------------------
 * Definitions for Serial Presence Detect EEPROM address
 * (to get SDRAM settings)
 */
221
#define SPD_EEPROM_ADDRESS	0x50
222 223 224 225 226 227

/*
 * Internal Definitions
 *
 * Boot Flags
 */
228 229
#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM	0x02		/* Software reboot		*/
230 231

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
232
#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
233
#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
234 235 236 237
#endif

/* JFFS2 stuff */

238 239 240
#define CFG_JFFS2_FIRST_BANK	0
#define CFG_JFFS2_NUM_BANKS	1
#define CFG_JFFS2_FIRST_SECTOR	1
241 242 243 244

#define CONFIG_NET_MULTI
#define CONFIG_E1000

245 246 247
#define CFG_ETH_DEV_FN		0x0800
#define CFG_ETH_IOBASE		0x31000000
#define CFG_ETH_MEMBASE		0x32000000
248

249
#endif	/* __CONFIG_H */