• Dipen Dudhat's avatar
    powerpc/85xx: Add support for Integrated Flash Controller (IFC) · d789b5f5
    Dipen Dudhat authored
    
    
    The Integrated Flash Controller (IFC) is used to access the external
    NAND Flash, NOR Flash, EPROM, SRAM and Generic ASIC memories.Four chip
    selects are provided in IFC so that maximum of four Flash devices can be
    hooked, but only one can be accessed at a given time.
    
    Features supported by IFC are,
            - Functional muxing of pins between NAND, NOR and GPCM
            - Support memory banks of size 64KByte to 4 GBytes
            - Write protection capability (only for NAND and NOR)
            - Provision of Software Reset
            - Flexible Timing programmability for every chip select
            - NAND Machine
                    - x8/ x16 NAND Flash Interface
                    - SLC and MLC NAND Flash devices support with
                      configurable
                      page sizes of upto 4KB
                    - Internal SRAM of 9KB which is directly mapped and
                      availble at
                      boot time for NAND Boot
                    - Configurable block size
                    - Boot chip select (CS0) available at system reset
            - NOR Machine
                    - Data bus width of 8/16/32
                    - Compatible with asynchronous NOR Flash
                    - Directly memory mapped
                    - Supports address data multiplexed (ADM) NOR device
                    - Boot chip select (CS0) available at system reset
            - GPCM Machine (NORMAL GPCM Mode)
                    - Support for x8/16/32 bit device
                    - Compatible with general purpose addressable device
                      e.g. SRAM, ROM
                    - External clock is supported with programmable division
                      ratio
            - GPCM Machine (Generic ASIC Mode)
                    - Support for x8/16/32 bit device
                    - Address and Data are shared on I/O bus
                    - Following Address and Data sequences can be supported
                      on I/O bus
                           - 32 bit I/O: AD
                           - 16 bit I/O: AADD
                           - 8 bit I/O : AAAADDDD
                    - Configurable Even/Odd Parity on Address/Data bus
                      supported
    
    Signed-off-by: default avatarDipen Dudhat <Dipen.Dudhat@freescale.com>
    Acked-by: default avatarScott Wood <scottwood@freescale.com>
    Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
    d789b5f5