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Ye Li authored
Accroding to RM, the Receive FIFO Enable (RXFE) field in LPUART FIFO register is bit 3, so the definition should change to 0x08 not 0x40. Otherwise the Receive FIFO is not disabled. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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