Commit 04868b40 authored by Mateusz Kulikowski's avatar Mateusz Kulikowski Committed by Tom Rini

drivers: Add SPMI bus uclass

Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: default avatarMateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
Tested-by: default avatarSimon Glass <sjg@chromium.org>
parent 5a822118
......@@ -60,6 +60,8 @@ source "drivers/sound/Kconfig"
source "drivers/spi/Kconfig"
source "drivers/spmi/Kconfig"
source "drivers/thermal/Kconfig"
source "drivers/timer/Kconfig"
......
......@@ -54,6 +54,7 @@ obj-y += dfu/
obj-$(CONFIG_X86) += pch/
obj-y += rtc/
obj-y += sound/
obj-y += spmi/
obj-y += timer/
obj-y += tpm/
obj-y += twserial/
......
menu "SPMI support"
config SPMI
bool "Enable SPMI bus support"
depends on DM
---help---
Select this to enable to support SPMI bus.
SPMI (System Power Management Interface) bus is used
to connect PMIC devices on various SoCs.
endmenu
#
# (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_SPMI) += spmi-uclass.o
/*
* SPMI bus uclass driver
*
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/root.h>
#include <spmi/spmi.h>
#include <linux/ctype.h>
DECLARE_GLOBAL_DATA_PTR;
int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg)
{
const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->read)
return -ENOSYS;
return ops->read(dev, usid, pid, reg);
}
int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
uint8_t value)
{
const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->write)
return -ENOSYS;
return ops->write(dev, usid, pid, reg, value);
}
static int spmi_post_bind(struct udevice *dev)
{
return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
}
UCLASS_DRIVER(spmi) = {
.id = UCLASS_SPMI,
.name = "spmi",
.post_bind = spmi_post_bind,
};
......@@ -66,6 +66,7 @@ enum uclass_id {
UCLASS_RTC, /* Real time clock device */
UCLASS_SERIAL, /* Serial UART */
UCLASS_SPI, /* SPI bus */
UCLASS_SPMI, /* System Power Management Interface bus */
UCLASS_SPI_FLASH, /* SPI flash */
UCLASS_SPI_GENERIC, /* Generic SPI flash target */
UCLASS_SYSCON, /* System configuration device */
......
#ifndef _SPMI_SPMI_H
#define _SPMI_SPMI_H
/**
* struct dm_spmi_ops - SPMI device I/O interface
*
* Should be implemented by UCLASS_SPMI device drivers. The standard
* device operations provides the I/O interface for it's childs.
*
* @read: read register 'reg' of slave 'usid' and peripheral 'pid'
* @write: write register 'reg' of slave 'usid' and peripheral 'pid'
*
* Each register is 8-bit, both read and write can return negative values
* on error.
*/
struct dm_spmi_ops {
int (*read)(struct udevice *dev, int usid, int pid, int reg);
int (*write)(struct udevice *dev, int usid, int pid, int reg,
uint8_t value);
};
/**
* spmi_reg_read() - read a register from specific slave/peripheral
*
* @dev: SPMI bus to read
* @usid SlaveID
* @pid Peripheral ID
* @reg: Register to read
* @return value read on success or negative value of errno.
*/
int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg);
/**
* spmi_reg_write() - write a register of specific slave/peripheral
*
* @dev: SPMI bus to write
* @usid SlaveID
* @pid Peripheral ID
* @reg: Register to write
* @value: Value to write
* @return 0 on success or negative value of errno.
*/
int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
uint8_t value);
#endif
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