Commit 10a28644 authored by Ramneek Mehresh's avatar Ramneek Mehresh Committed by Marek Vasut

ls1021atwr: Enable USB IP support

Enable USB IP support for both EHCI and XHCI for
ls1021atwr platform
Signed-off-by: default avatarRamneek Mehresh <ramneek.mehresh@freescale.com>
parent d09e401b
......@@ -27,6 +27,44 @@
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
/*
* USB
*/
/*
* EHCI Support - disbaled by default as
* there is no signal coming out of soc on
* this board for this controller. However,
* the silicon still has this controller,
* and anyone can use this controller by
* taking signals out on their board.
*/
/*#define CONFIG_HAS_FSL_DR_USB*/
#ifdef CONFIG_HAS_FSL_DR_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_FSL
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#endif
/* XHCI Support - enabled by default */
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_XHCI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_EXT2
#endif
/*
* Generic Timer Definitions
*/
......
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