Commit 115200ce authored by Hans de Goede's avatar Hans de Goede

sunxi: ehci: Add proper Kconfig options to select the usb Vbus gpio-s

Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to
Kconfig being the right thing to do, an added advantage of this is that it
allows for boards without Vbus gpio-s.
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Acked-by: default avatarIan Campbell <ijc@hellion.org.uk>
parent 505eceec
......@@ -197,4 +197,18 @@ config MMC_SUNXI_SLOT_EXTRA
slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
support for this.
config USB1_VBUS_PIN
string "Vbus enable pin for usb1 (ehci0)"
default "PH6" if MACH_SUN4I || MACH_SUN7I
---help---
Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
a string in the format understood by sunxi_name_to_gpio, e.g.
PH1 for pin 1 of port H.
config USB2_VBUS_PIN
string "Vbus enable pin for usb2 (ehci1)"
default "PH3" if MACH_SUN4I || MACH_SUN7I
---help---
See USB1_VBUS_PIN help text.
endif
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,SUNXI_EMAC,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPB(10)"
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,SUNXI_EMAC,USB_EHCI"
CONFIG_FDTFILE="sun5i-a10s-olinuxino-micro.dtb"
CONFIG_MMC_SUNXI_SLOT_EXTRA=1
CONFIG_USB1_VBUS_PIN="PB10"
+S:CONFIG_MMC0_CD_PIN="PG1"
+S:CONFIG_MMC1_CD_PIN="PG13"
+S:CONFIG_ARM=y
......
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(11)"
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,USB_EHCI"
CONFIG_FDTFILE="sun5i-a13-olinuxino-micro.dtb"
CONFIG_USB1_VBUS_PIN="PG11"
+S:CONFIG_ARM=y
+S:CONFIG_ARCH_SUNXI=y
+S:CONFIG_MACH_SUN5I=y
......
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(11)"
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER,USB_EHCI"
CONFIG_FDTFILE="sun5i-a13-olinuxino.dtb"
CONFIG_USB1_VBUS_PIN="PG11"
+S:CONFIG_ARM=y
+S:CONFIG_ARCH_SUNXI=y
+S:CONFIG_MACH_SUN5I=y
......
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(13)"
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI"
CONFIG_FDTFILE="sun5i-a10s-auxtek-t004.dtb"
CONFIG_USB1_VBUS_PIN="PG13"
+S:CONFIG_ARM=y
+S:CONFIG_ARCH_SUNXI=y
+S:CONFIG_MACH_SUN5I=y
......
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,USB_EHCI,SUNXI_USB_VBUS1_GPIO=SUNXI_GPH(12)"
CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_EMAC,USB_EHCI"
CONFIG_FDTFILE="sun4i-a10-ba10-tvbox.dtb"
CONFIG_USB1_VBUS_PIN="PH12"
+S:CONFIG_ARM=y
+S:CONFIG_ARCH_SUNXI=y
+S:CONFIG_MACH_SUN4I=y
......
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(13)"
CONFIG_SYS_EXTRA_OPTIONS="AXP152_POWER,USB_EHCI"
CONFIG_FDTFILE="sun5i-a10s-r7-tv-dongle.dtb"
CONFIG_USB1_VBUS_PIN="PG13"
+S:CONFIG_ARM=y
+S:CONFIG_ARCH_SUNXI=y
+S:CONFIG_MACH_SUN5I=y
......
......@@ -39,7 +39,6 @@ static struct sunxi_ehci_hcd {
{
.usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
.gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
.csr = (void *)SUNXI_USB_CSR,
.irq = 39,
.id = 1,
......@@ -48,7 +47,6 @@ static struct sunxi_ehci_hcd {
{
.usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1,
.gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
.csr = (void *)SUNXI_USB_CSR,
.irq = 40,
.id = 2,
......@@ -68,6 +66,15 @@ static void *get_io_base(int hcd_id)
return NULL;
}
static int get_vbus_gpio(int hcd_id)
{
switch (hcd_id) {
case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN);
case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN);
}
return -1;
}
static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
int data, int len)
{
......@@ -143,14 +150,16 @@ static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci)
sunxi_usb_passby(sunxi_ehci, SUNXI_USB_PASSBY_EN);
gpio_direction_output(sunxi_ehci->gpio_vbus, 1);
if (sunxi_ehci->gpio_vbus != -1)
gpio_direction_output(sunxi_ehci->gpio_vbus, 1);
}
static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
gpio_direction_output(sunxi_ehci->gpio_vbus, 0);
if (sunxi_ehci->gpio_vbus != -1)
gpio_direction_output(sunxi_ehci->gpio_vbus, 0);
sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN);
......@@ -165,13 +174,17 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index];
int err;
sunxi_ehci->gpio_vbus = get_vbus_gpio(sunxi_ehci->id);
/* enable common PHY only once */
if (index == 0)
setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus");
if (err)
return err;
if (sunxi_ehci->gpio_vbus != -1) {
err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus");
if (err)
return err;
}
sunxi_ehci_enable(sunxi_ehci);
......@@ -197,9 +210,11 @@ int ehci_hcd_stop(int index)
sunxi_ehci_disable(sunxi_ehci);
err = gpio_free(sunxi_ehci->gpio_vbus);
if (err)
return err;
if (sunxi_ehci->gpio_vbus != -1) {
err = gpio_free(sunxi_ehci->gpio_vbus);
if (err)
return err;
}
/* disable common PHY only once, for the last enabled hcd */
if (enabled_hcd_count == 1)
......
......@@ -18,14 +18,7 @@
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#ifndef CONFIG_SUNXI_USB_VBUS0_GPIO
#define CONFIG_SUNXI_USB_VBUS0_GPIO SUNXI_GPH(6)
#endif
#ifndef CONFIG_SUNXI_USB_VBUS1_GPIO
#define CONFIG_SUNXI_USB_VBUS1_GPIO SUNXI_GPH(3)
#endif
#endif
/*
......
......@@ -19,14 +19,7 @@
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#ifndef CONFIG_SUNXI_USB_VBUS0_GPIO
#define CONFIG_SUNXI_USB_VBUS0_GPIO SUNXI_GPH(6)
#endif
#ifndef CONFIG_SUNXI_USB_VBUS1_GPIO
#define CONFIG_SUNXI_USB_VBUS1_GPIO SUNXI_GPH(3)
#endif
#endif
#define CONFIG_ARMV7_VIRT 1
......
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