Commit 193e7e5a authored by Haikun Wang's avatar Haikun Wang Committed by York Sun

arm/dts/ls2085a: Add dts files for LS2085AQDS and LS2085ARDB

Add dts source files for LS2085AQDS and LS2085ARDB boards.
Signed-off-by: default avatarHaikun Wang <haikun.wang@freescale.com>
Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
parent fe69a0e8
......@@ -57,6 +57,8 @@ dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \
ls1021a-twr.dtb
dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2085a-qds.dtb \
fsl-ls2085a-rdb.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
......
/*
* Freescale ls2085a QDS board device tree source
*
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "fsl-ls2085a.dtsi"
/ {
model = "Freescale Layerscape 2085a QDS Board";
compatible = "fsl,ls2085a-qds", "fsl,ls2085a";
aliases {
spi1 = &dspi;
};
};
&dspi {
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <2>;
};
};
/*
* Freescale ls2085a RDB board device tree source
*
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "fsl-ls2085a.dtsi"
/ {
model = "Freescale Layerscape 2085a RDB Board";
compatible = "fsl,ls2085a-rdb", "fsl,ls2085a";
aliases {
spi1 = &dspi;
};
};
&dspi {
bus-num = <0>;
status = "okay";
dflash0: n25q512a {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
};
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