Commit 1e9ea85f authored by York Sun's avatar York Sun Committed by Andy Fleming

powerpc/P4080: Check SVR for CPU22 workaround

Workaround for erratum CPU22 applies to P4080 rev 1 and rev 2 only.
Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
parent 7b6e8053
...@@ -51,7 +51,8 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ...@@ -51,7 +51,8 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
puts("Work-around for Erratum SERDES-A005 enabled\n"); puts("Work-around for Erratum SERDES-A005 enabled\n");
#endif #endif
#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22)
puts("Work-around for Erratum CPU22 enabled\n"); if (SVR_MAJ(svr) < 3)
puts("Work-around for Erratum CPU22 enabled\n");
#endif #endif
#if defined(CONFIG_SYS_FSL_ERRATUM_CPU_A003999) #if defined(CONFIG_SYS_FSL_ERRATUM_CPU_A003999)
puts("Work-around for Erratum CPU-A003999 enabled\n"); puts("Work-around for Erratum CPU-A003999 enabled\n");
......
...@@ -309,9 +309,11 @@ int cpu_init_r(void) ...@@ -309,9 +309,11 @@ int cpu_init_r(void)
#endif #endif
#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22)
flush_dcache(); if (SVR_MAJ(svr) < 3) {
mtspr(L1CSR2, (mfspr(L1CSR2) | L1CSR2_DCWS)); flush_dcache();
sync(); mtspr(L1CSR2, (mfspr(L1CSR2) | L1CSR2_DCWS));
sync();
}
#endif #endif
puts ("L2: "); puts ("L2: ");
......
...@@ -144,9 +144,17 @@ __secondary_start_page: ...@@ -144,9 +144,17 @@ __secondary_start_page:
#endif #endif
#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22)
/* apply to P4080 rev 1 and rev 2 */
mfspr r3,SPRN_SVR
rlwinm r3,r3,0,0xf0
li r4,0x30
cmpw r3,r4
bge 2f
mfspr r8,L1CSR2 mfspr r8,L1CSR2
oris r8,r8,(L1CSR2_DCWS)@h oris r8,r8,(L1CSR2_DCWS)@h
mtspr L1CSR2,r8 mtspr L1CSR2,r8
2:
#endif #endif
#ifdef CONFIG_BACKSIDE_L2_CACHE #ifdef CONFIG_BACKSIDE_L2_CACHE
......
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