Commit 1fa943b9 authored by Vipin KUMAR's avatar Vipin KUMAR Committed by Albert ARIBAUD

SPEAr: Configure FSMC driver for NAND interface

Since FSMC is a standard IP and it supports different memory interfaces, it
is supported independent of spear platform and spear is configured to use that
driver for interfacing with the NAND device
Signed-off-by: default avatarVipin Kumar <vipin.kumar@st.com>
Signed-off-by: default avatarAmit Virdi <amit.virdi@st.com>
Signed-off-by: default avatarStefan Roese <sr@denx.de>
Acked-by: default avatarScott Wood <scottwood@freescale.com>
parent 7f0730a0
......@@ -37,15 +37,15 @@
#if defined(CONFIG_SPEAR600)
#define CONFIG_SYS_I2C_BASE (0xD0200000)
#define CONFIG_SPEAR_FSMCBASE (0xD1800000)
#define CONFIG_SYS_FSMC_BASE (0xD1800000)
#elif defined(CONFIG_SPEAR300)
#define CONFIG_SYS_I2C_BASE (0xD0180000)
#define CONFIG_SPEAR_FSMCBASE (0x94000000)
#define CONFIG_SYS_FSMC_BASE (0x94000000)
#elif defined(CONFIG_SPEAR310)
#define CONFIG_SYS_I2C_BASE (0xD0180000)
#define CONFIG_SPEAR_FSMCBASE (0x44000000)
#define CONFIG_SYS_FSMC_BASE (0x44000000)
#undef CONFIG_SYS_NAND_CLE
#undef CONFIG_SYS_NAND_ALE
......@@ -57,7 +57,7 @@
#elif defined(CONFIG_SPEAR320)
#define CONFIG_SYS_I2C_BASE (0xD0180000)
#define CONFIG_SPEAR_FSMCBASE (0x4C000000)
#define CONFIG_SYS_FSMC_BASE (0x4C000000)
#define CONFIG_SPEAR_EMIBASE (0x40000000)
#define CONFIG_SPEAR_RASBASE (0xB3000000)
......
......@@ -24,10 +24,12 @@
#include <common.h>
#include <nand.h>
#include <asm/io.h>
#include <linux/mtd/fsmc_nand.h>
#include <asm/arch/hardware.h>
#include <asm/arch/spr_defs.h>
#include <asm/arch/spr_misc.h>
#include <asm/arch/spr_nand.h>
static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
int board_init(void)
{
......@@ -41,18 +43,20 @@ int board_init(void)
* Called by nand_init_chip to initialize the board specific functions
*/
int board_nand_init(struct nand_chip *nand)
void board_nand_init()
{
struct misc_regs *const misc_regs_p =
(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
struct nand_chip *nand = &nand_chip[0];
#if defined(CONFIG_NAND_FSMC)
if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
MISC_SOCCFG30) ||
((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
MISC_SOCCFG31)) {
return spear_nand_init(nand);
fsmc_nand_init(nand);
}
return -1;
#endif
return;
}
......@@ -25,10 +25,12 @@
#include <common.h>
#include <nand.h>
#include <asm/io.h>
#include <linux/mtd/fsmc_nand.h>
#include <asm/arch/hardware.h>
#include <asm/arch/spr_defs.h>
#include <asm/arch/spr_misc.h>
#include <asm/arch/spr_nand.h>
static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
int board_init(void)
{
......@@ -42,18 +44,20 @@ int board_init(void)
* Called by nand_init_chip to initialize the board specific functions
*/
int board_nand_init(struct nand_chip *nand)
void board_nand_init()
{
struct misc_regs *const misc_regs_p =
(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
struct nand_chip *nand = &nand_chip[0];
#if defined(CONFIG_NAND_FSMC)
if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
MISC_SOCCFG30) ||
((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
MISC_SOCCFG31)) {
return spear_nand_init(nand);
fsmc_nand_init(nand);
}
return -1;
#endif
return;
}
......@@ -25,10 +25,12 @@
#include <common.h>
#include <nand.h>
#include <asm/io.h>
#include <linux/mtd/fsmc_nand.h>
#include <asm/arch/hardware.h>
#include <asm/arch/spr_defs.h>
#include <asm/arch/spr_misc.h>
#include <asm/arch/spr_nand.h>
static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
int board_init(void)
{
......@@ -42,18 +44,21 @@ int board_init(void)
* Called by nand_init_chip to initialize the board specific functions
*/
int board_nand_init(struct nand_chip *nand)
void board_nand_init()
{
struct misc_regs *const misc_regs_p =
(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
struct nand_chip *nand = &nand_chip[0];
#if defined(CONFIG_NAND_FSMC)
if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
MISC_SOCCFG30) ||
((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
MISC_SOCCFG31)) {
return spear_nand_init(nand);
fsmc_nand_init(nand);
}
#endif
return -1;
return;
}
......@@ -24,10 +24,12 @@
#include <common.h>
#include <nand.h>
#include <asm/io.h>
#include <linux/mtd/fsmc_nand.h>
#include <asm/arch/hardware.h>
#include <asm/arch/spr_defs.h>
#include <asm/arch/spr_misc.h>
#include <asm/arch/spr_nand.h>
static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
int board_init(void)
{
......@@ -41,13 +43,15 @@ int board_init(void)
* Called by nand_init_chip to initialize the board specific functions
*/
int board_nand_init(struct nand_chip *nand)
void board_nand_init()
{
struct misc_regs *const misc_regs_p =
(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
struct nand_chip *nand = &nand_chip[0];
#if defined(CONFIG_NAND_FSMC)
if (!(readl(&misc_regs_p->auto_cfg_reg) & MISC_NANDDIS))
return spear_nand_init(nand);
return -1;
fsmc_nand_init(nand);
#endif
return;
}
......@@ -88,9 +88,10 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE
/* NAND FLASH Configuration */
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_NAND_SPEAR 1
#define CONFIG_NAND_FSMC
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
......
......@@ -117,6 +117,10 @@
#endif
/* NAND flash configuration */
#define CONFIG_SYS_FSMC_NAND_SP
#define CONFIG_SYS_FSMC_NAND_8BIT
#if defined(CONFIG_SPEAR300)
#define CONFIG_SYS_NAND_BASE (0x80000000)
......
......@@ -38,6 +38,9 @@
#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1 }
/* NAND flash configuration */
#define CONFIG_SYS_FSMC_NAND_SP
#define CONFIG_SYS_FSMC_NAND_8BIT
#define CONFIG_SYS_NAND_BASE (0xD2000000)
#endif /* __CONFIG_H */
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