Commit 2a6e3869 authored by Michal Simek's avatar Michal Simek

fpga: spartan3: Avoid CamelCase

No functional changes.
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent b625b9ae
......@@ -26,7 +26,7 @@
* Spartan2 code is used to download our Spartan 3 :) code is compatible.
* Just take care about the file size
*/
Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
xilinx_spartan3_slave_parallel_fns fpga_fns = {
fpga_pre_fn,
fpga_pgm_fn,
fpga_init_fn,
......@@ -43,7 +43,7 @@ Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
};
Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
{Xilinx_Spartan3,
{xilinx_spartan3,
slave_parallel,
1196128l/8,
(void *)&fpga_fns,
......
......@@ -363,7 +363,7 @@ int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
* relocated at runtime.
* FIXME: relocation not yet working for coldfire, see below!
*/
Xilinx_Spartan3_Slave_Serial_fns xilinx_fns = {
xilinx_spartan3_slave_serial_fns xilinx_fns = {
xilinx_pre_config_fn,
xilinx_pgm_fn,
xilinx_clk_fn,
......@@ -375,7 +375,7 @@ Xilinx_Spartan3_Slave_Serial_fns xilinx_fns = {
};
Xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
{Xilinx_Spartan3,
{xilinx_spartan3,
slave_serial,
XILINX_XC3S4000_SIZE,
(void *)&xilinx_fns,
......
......@@ -191,7 +191,7 @@ int fpga_cs_fn(int assert_clk, int flush, int cookie)
return assert_clk;
}
Xilinx_Spartan3_Slave_Parallel_fns balloon3_fpga_fns = {
xilinx_spartan3_slave_parallel_fns balloon3_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_init_fn,
......
......@@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define USE_SP_CODE
#ifdef USE_SP_CODE
Xilinx_Spartan3_Slave_Parallel_fns pmc440_fpga_fns = {
xilinx_spartan3_slave_parallel_fns pmc440_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_init_fn,
......@@ -36,7 +36,7 @@ Xilinx_Spartan3_Slave_Parallel_fns pmc440_fpga_fns = {
fpga_post_config_fn,
};
#else
Xilinx_Spartan3_Slave_Serial_fns pmc440_fpga_fns = {
xilinx_spartan3_slave_serial_fns pmc440_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_clk_fn,
......
......@@ -16,7 +16,7 @@
#include "fpga.h"
#include "mvsmr.h"
Xilinx_Spartan3_Slave_Serial_fns fpga_fns = {
xilinx_spartan3_slave_serial_fns fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_clk_fn,
......
......@@ -163,7 +163,7 @@ static int fpga_wr_fn(int assert_write, int flush, int cookie)
return assert_write;
}
static Xilinx_Spartan3_Slave_Serial_fns x600_fpga_fns = {
static xilinx_spartan3_slave_serial_fns x600_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_clk_fn,
......
......@@ -190,7 +190,7 @@ int fpga_clk_fn(int assert_clk, int flush, int cookie)
return assert_clk;
}
Xilinx_Spartan3_Slave_Serial_fns mt_ventoux_fpga_fns = {
xilinx_spartan3_slave_serial_fns mt_ventoux_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_clk_fn,
......
......@@ -35,29 +35,29 @@
#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
#endif
static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
/* static int Spartan3_sp_info(Xilinx_desc *desc ); */
static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
/* static int spartan3_sp_info(Xilinx_desc *desc ); */
static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int Spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
/* static int Spartan3_ss_info(Xilinx_desc *desc); */
static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
/* static int spartan3_ss_info(Xilinx_desc *desc); */
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
int Spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize)
int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
ret_val = Spartan3_ss_load (desc, buf, bsize);
ret_val = spartan3_ss_load(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
ret_val = Spartan3_sp_load (desc, buf, bsize);
ret_val = spartan3_sp_load(desc, buf, bsize);
break;
default:
......@@ -68,19 +68,19 @@ int Spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
ret_val = Spartan3_ss_dump (desc, buf, bsize);
ret_val = spartan3_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
ret_val = Spartan3_sp_dump (desc, buf, bsize);
ret_val = spartan3_sp_dump(desc, buf, bsize);
break;
default:
......@@ -91,7 +91,7 @@ int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
int Spartan3_info( Xilinx_desc *desc )
int spartan3_info(Xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
......@@ -100,10 +100,10 @@ int Spartan3_info( Xilinx_desc *desc )
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns;
PRINTF ("%s: start with interface functions @ 0x%p\n",
__FUNCTION__, fn);
......@@ -254,10 +254,10 @@ static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns;
if (fn) {
unsigned char *data = (unsigned char *) buf;
......@@ -302,10 +302,10 @@ static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
/* ------------------------------------------------------------------------- */
static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan3_Slave_Serial_fns *fn = desc->iface_fns;
xilinx_spartan3_slave_serial_fns *fn = desc->iface_fns;
int i;
unsigned char val;
......@@ -457,7 +457,7 @@ static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
static int Spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
/* Readback is only available through the Slave Parallel and */
/* boundary-scan interfaces. */
......
......@@ -159,11 +159,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__);
#endif
break;
case Xilinx_Spartan3:
case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
PRINTF ("%s: Launching the Spartan-III Loader...\n",
__FUNCTION__);
ret_val = Spartan3_load (desc, buf, bsize);
ret_val = spartan3_load(desc, buf, bsize);
#else
printf ("%s: No support for Spartan-III devices.\n",
__FUNCTION__);
......@@ -216,11 +216,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__);
#endif
break;
case Xilinx_Spartan3:
case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
PRINTF ("%s: Launching the Spartan-III Reader...\n",
__FUNCTION__);
ret_val = Spartan3_dump (desc, buf, bsize);
ret_val = spartan3_dump(desc, buf, bsize);
#else
printf ("%s: No support for Spartan-III devices.\n",
__FUNCTION__);
......@@ -265,7 +265,7 @@ int xilinx_info (Xilinx_desc * desc)
case xilinx_spartan2:
printf ("Spartan-II\n");
break;
case Xilinx_Spartan3:
case xilinx_spartan3:
printf ("Spartan-III\n");
break;
case Xilinx_Virtex2:
......@@ -325,9 +325,9 @@ int xilinx_info (Xilinx_desc * desc)
__FUNCTION__);
#endif
break;
case Xilinx_Spartan3:
case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
Spartan3_info (desc);
spartan3_info(desc);
#else
/* just in case */
printf ("%s: No support for Spartan-III devices.\n",
......
......@@ -10,9 +10,9 @@
#include <xilinx.h>
extern int Spartan3_load(Xilinx_desc *desc, const void *image, size_t size);
extern int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
extern int Spartan3_info(Xilinx_desc *desc);
int spartan3_load(Xilinx_desc *desc, const void *image, size_t size);
int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
int spartan3_info(Xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
......@@ -29,7 +29,7 @@ typedef struct {
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
} Xilinx_Spartan3_Slave_Parallel_fns;
} xilinx_spartan3_slave_parallel_fns;
/* Slave Serial Implementation function table */
typedef struct {
......@@ -42,7 +42,7 @@ typedef struct {
Xilinx_post_fn post;
Xilinx_bwr_fn bwr; /* block write function */
Xilinx_abort_fn abort;
} Xilinx_Spartan3_Slave_Serial_fns;
} xilinx_spartan3_slave_serial_fns;
/* Device Image Sizes
*********************************************************************/
......@@ -73,46 +73,46 @@ typedef struct {
*********************************************************************/
/* Spartan-III devices */
#define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
#define XILINX_XC3S200_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie }
#define XILINX_XC3S400_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie }
#define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie }
#define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie }
#define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie }
#define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie }
#define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie }
/* Spartan-3E devices */
#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
#define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie }
{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie }
#endif /* _SPARTAN3_H_ */
......@@ -29,7 +29,7 @@ typedef enum { /* typedef Xilinx_Family */
xilinx_spartan2, /* Spartan-II Family */
Xilinx_VirtexE, /* Virtex-E Family */
Xilinx_Virtex2, /* Virtex2 Family */
Xilinx_Spartan3, /* Spartan-III Family */
xilinx_spartan3, /* Spartan-III Family */
xilinx_zynq, /* Zynq Family */
max_xilinx_type /* insert all new types before this */
} Xilinx_Family; /* end, typedef Xilinx_Family */
......
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