Commit 2df9d5c4 authored by Michal Simek's avatar Michal Simek

fpga: xilinx: Fix the rest of CamelCases

No functional changes.
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent f8c1be98
......@@ -203,7 +203,7 @@ int astro5373l_altera_load(void)
}
/* Set the FPGA's PROG_B line to the specified level */
int xilinx_pgm_fn(int assert, int flush, int cookie)
int xilinx_pgm_config_fn(int assert, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
......@@ -218,7 +218,7 @@ int xilinx_pgm_fn(int assert, int flush, int cookie)
* Test the state of the active-low FPGA INIT line. Return 1 on INIT
* asserted (low).
*/
int xilinx_init_fn(int cookie)
int xilinx_init_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
......@@ -226,7 +226,7 @@ int xilinx_init_fn(int cookie)
}
/* Test the state of the active-high FPGA DONE pin */
int xilinx_done_fn(int cookie)
int xilinx_done_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
......@@ -234,7 +234,7 @@ int xilinx_done_fn(int cookie)
}
/* Abort an FPGA operation */
int xilinx_abort_fn(int cookie)
int xilinx_abort_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
/* ensure all SPI peripherals and FPGAs are deselected */
......@@ -300,7 +300,7 @@ int xilinx_post_config_fn(int cookie)
return rc;
}
int xilinx_clk_fn(int assert_clk, int flush, int cookie)
int xilinx_clk_config_fn(int assert_clk, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
......@@ -311,7 +311,7 @@ int xilinx_clk_fn(int assert_clk, int flush, int cookie)
return assert_clk;
}
int xilinx_wr_fn(int assert_write, int flush, int cookie)
int xilinx_wr_config_fn(int assert_write, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
......@@ -322,7 +322,7 @@ int xilinx_wr_fn(int assert_write, int flush, int cookie)
return assert_write;
}
int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
int xilinx_fastwr_config_fn(void *buf, size_t len, int flush, int cookie)
{
size_t bytecount = 0;
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
......@@ -365,13 +365,13 @@ int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
*/
xilinx_spartan3_slave_serial_fns xilinx_fns = {
xilinx_pre_config_fn,
xilinx_pgm_fn,
xilinx_clk_fn,
xilinx_init_fn,
xilinx_done_fn,
xilinx_wr_fn,
xilinx_pgm_config_fn,
xilinx_clk_config_fn,
xilinx_init_config_fn,
xilinx_done_config_fn,
xilinx_wr_config_fn,
0,
xilinx_fastwr_fn
xilinx_fastwr_config_fn
};
xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
......@@ -395,12 +395,12 @@ int astro5373l_xilinx_load(void)
* so set stuff here instead of static initialisation:
*/
xilinx_fns.pre = xilinx_pre_config_fn;
xilinx_fns.pgm = xilinx_pgm_fn;
xilinx_fns.clk = xilinx_clk_fn;
xilinx_fns.init = xilinx_init_fn;
xilinx_fns.done = xilinx_done_fn;
xilinx_fns.wr = xilinx_wr_fn;
xilinx_fns.bwr = xilinx_fastwr_fn;
xilinx_fns.pgm = xilinx_pgm_config_fn;
xilinx_fns.clk = xilinx_clk_config_fn;
xilinx_fns.init = xilinx_init_config_fn;
xilinx_fns.done = xilinx_done_config_fn;
xilinx_fns.wr = xilinx_wr_config_fn;
xilinx_fns.bwr = xilinx_fastwr_config_fn;
xilinx_fpga[i].iface_fns = (void *)&xilinx_fns;
fpga_add(fpga_xilinx, &xilinx_fpga[i]);
}
......
......@@ -16,30 +16,30 @@ int spartan2_info(xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
Xilinx_pre_fn pre;
Xilinx_pgm_fn pgm;
Xilinx_init_fn init;
Xilinx_err_fn err;
Xilinx_done_fn done;
Xilinx_clk_fn clk;
Xilinx_cs_fn cs;
Xilinx_wr_fn wr;
Xilinx_rdata_fn rdata;
Xilinx_wdata_fn wdata;
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
xilinx_pre_fn pre;
xilinx_pgm_fn pgm;
xilinx_init_fn init;
xilinx_err_fn err;
xilinx_done_fn done;
xilinx_clk_fn clk;
xilinx_cs_fn cs;
xilinx_wr_fn wr;
xilinx_rdata_fn rdata;
xilinx_wdata_fn wdata;
xilinx_busy_fn busy;
xilinx_abort_fn abort;
xilinx_post_fn post;
} xilinx_spartan2_slave_parallel_fns;
/* Slave Serial Implementation function table */
typedef struct {
Xilinx_pre_fn pre;
Xilinx_pgm_fn pgm;
Xilinx_clk_fn clk;
Xilinx_init_fn init;
Xilinx_done_fn done;
Xilinx_wr_fn wr;
Xilinx_post_fn post;
xilinx_pre_fn pre;
xilinx_pgm_fn pgm;
xilinx_clk_fn clk;
xilinx_init_fn init;
xilinx_done_fn done;
xilinx_wr_fn wr;
xilinx_post_fn post;
} xilinx_spartan2_slave_serial_fns;
/* Device Image Sizes
......
......@@ -16,32 +16,32 @@ int spartan3_info(xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
Xilinx_pre_fn pre;
Xilinx_pgm_fn pgm;
Xilinx_init_fn init;
Xilinx_err_fn err;
Xilinx_done_fn done;
Xilinx_clk_fn clk;
Xilinx_cs_fn cs;
Xilinx_wr_fn wr;
Xilinx_rdata_fn rdata;
Xilinx_wdata_fn wdata;
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
xilinx_pre_fn pre;
xilinx_pgm_fn pgm;
xilinx_init_fn init;
xilinx_err_fn err;
xilinx_done_fn done;
xilinx_clk_fn clk;
xilinx_cs_fn cs;
xilinx_wr_fn wr;
xilinx_rdata_fn rdata;
xilinx_wdata_fn wdata;
xilinx_busy_fn busy;
xilinx_abort_fn abort;
xilinx_post_fn post;
} xilinx_spartan3_slave_parallel_fns;
/* Slave Serial Implementation function table */
typedef struct {
Xilinx_pre_fn pre;
Xilinx_pgm_fn pgm;
Xilinx_clk_fn clk;
Xilinx_init_fn init;
Xilinx_done_fn done;
Xilinx_wr_fn wr;
Xilinx_post_fn post;
Xilinx_bwr_fn bwr; /* block write function */
Xilinx_abort_fn abort;
xilinx_pre_fn pre;
xilinx_pgm_fn pgm;
xilinx_clk_fn clk;
xilinx_init_fn init;
xilinx_done_fn done;
xilinx_wr_fn wr;
xilinx_post_fn post;
xilinx_bwr_fn bwr; /* block write function */
xilinx_abort_fn abort;
} xilinx_spartan3_slave_serial_fns;
/* Device Image Sizes
......
......@@ -19,27 +19,27 @@ int virtex2_info(xilinx_desc *desc);
* Slave SelectMap Implementation function table.
*/
typedef struct {
Xilinx_pre_fn pre;
Xilinx_pgm_fn pgm;
Xilinx_init_fn init;
Xilinx_err_fn err;
Xilinx_done_fn done;
Xilinx_clk_fn clk;
Xilinx_cs_fn cs;
Xilinx_wr_fn wr;
Xilinx_rdata_fn rdata;
Xilinx_wdata_fn wdata;
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
xilinx_pre_fn pre;
xilinx_pgm_fn pgm;
xilinx_init_fn init;
xilinx_err_fn err;
xilinx_done_fn done;
xilinx_clk_fn clk;
xilinx_cs_fn cs;
xilinx_wr_fn wr;
xilinx_rdata_fn rdata;
xilinx_wdata_fn wdata;
xilinx_busy_fn busy;
xilinx_abort_fn abort;
xilinx_post_fn post;
} xilinx_virtex2_slave_selectmap_fns;
/* Slave Serial Implementation function table */
typedef struct {
Xilinx_pgm_fn pgm;
Xilinx_clk_fn clk;
Xilinx_rdata_fn rdata;
Xilinx_wdata_fn wdata;
xilinx_pgm_fn pgm;
xilinx_clk_fn clk;
xilinx_rdata_fn rdata;
xilinx_wdata_fn wdata;
} xilinx_virtex2_slave_serial_fns;
/* Device Image Sizes (in bytes)
......
......@@ -12,7 +12,7 @@
/* Xilinx types
*********************************************************************/
typedef enum { /* typedef Xilinx_iface */
typedef enum { /* typedef xilinx_iface */
min_xilinx_iface_type, /* low range check value */
slave_serial, /* serial data and external clock */
master_serial, /* serial data w/ internal clock (not used) */
......@@ -22,21 +22,21 @@ typedef enum { /* typedef Xilinx_iface */
slave_selectmap, /* slave SelectMap (virtex2) */
devcfg, /* devcfg interface (zynq) */
max_xilinx_iface_type /* insert all new types before this */
} Xilinx_iface; /* end, typedef Xilinx_iface */
} xilinx_iface; /* end, typedef xilinx_iface */
typedef enum { /* typedef Xilinx_Family */
typedef enum { /* typedef xilinx_family */
min_xilinx_type, /* low range check value */
xilinx_spartan2, /* Spartan-II Family */
Xilinx_VirtexE, /* Virtex-E Family */
xilinx_virtexE, /* Virtex-E Family */
xilinx_virtex2, /* Virtex2 Family */
xilinx_spartan3, /* Spartan-III Family */
xilinx_zynq, /* Zynq Family */
max_xilinx_type /* insert all new types before this */
} Xilinx_Family; /* end, typedef Xilinx_Family */
} xilinx_family; /* end, typedef xilinx_family */
typedef struct { /* typedef xilinx_desc */
Xilinx_Family family; /* part type */
Xilinx_iface iface; /* interface type */
xilinx_family family; /* part type */
xilinx_iface iface; /* interface type */
size_t size; /* bytes of data part can accept */
void *iface_fns; /* interface function table */
int cookie; /* implementation specific cookie */
......@@ -51,19 +51,19 @@ int xilinx_info(xilinx_desc *desc);
/* Board specific implementation specific function types
*********************************************************************/
typedef int (*Xilinx_pgm_fn)( int assert_pgm, int flush, int cookie );
typedef int (*Xilinx_init_fn)( int cookie );
typedef int (*Xilinx_err_fn)( int cookie );
typedef int (*Xilinx_done_fn)( int cookie );
typedef int (*Xilinx_clk_fn)( int assert_clk, int flush, int cookie );
typedef int (*Xilinx_cs_fn)( int assert_cs, int flush, int cookie );
typedef int (*Xilinx_wr_fn)( int assert_write, int flush, int cookie );
typedef int (*Xilinx_rdata_fn)( unsigned char *data, int cookie );
typedef int (*Xilinx_wdata_fn)( unsigned char data, int flush, int cookie );
typedef int (*Xilinx_busy_fn)( int cookie );
typedef int (*Xilinx_abort_fn)( int cookie );
typedef int (*Xilinx_pre_fn)( int cookie );
typedef int (*Xilinx_post_fn)( int cookie );
typedef int (*Xilinx_bwr_fn)( void *buf, size_t len, int flush, int cookie );
typedef int (*xilinx_pgm_fn)(int assert_pgm, int flush, int cookie);
typedef int (*xilinx_init_fn)(int cookie);
typedef int (*xilinx_err_fn)(int cookie);
typedef int (*xilinx_done_fn)(int cookie);
typedef int (*xilinx_clk_fn)(int assert_clk, int flush, int cookie);
typedef int (*xilinx_cs_fn)(int assert_cs, int flush, int cookie);
typedef int (*xilinx_wr_fn)(int assert_write, int flush, int cookie);
typedef int (*xilinx_rdata_fn)(unsigned char *data, int cookie);
typedef int (*xilinx_wdata_fn)(unsigned char data, int flush, int cookie);
typedef int (*xilinx_busy_fn)(int cookie);
typedef int (*xilinx_abort_fn)(int cookie);
typedef int (*xilinx_pre_fn)(int cookie);
typedef int (*xilinx_post_fn)(int cookie);
typedef int (*xilinx_bwr_fn)(void *buf, size_t len, int flush, int cookie);
#endif /* _XILINX_H_ */
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