Commit 30f65c85 authored by Wenyou Yang's avatar Wenyou Yang Committed by Andreas Bießmann

board: atmel: siemens: clean up PLLB code

Due to introducing the new PLLB clock handle functions,
use these functions to clean up the PLLB enable code.
Signed-off-by: default avatarWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: default avatarAndreas Bießmann <andreas.devel@googlemail.com>
Tested-by: default avatarHeiko Schocher <hs@denx.de>
parent 9cf7385c
......@@ -115,12 +115,8 @@ static void smartweb_macb_hw_init(void)
void at91_udp_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
/* Enable PLLB */
writel(get_pllb_init(), &pmc->pllbr);
while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
at91_pllb_clk_enable(get_pllb_init());
/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
at91_periph_clk_enable(ATMEL_ID_UDP);
......
......@@ -289,12 +289,8 @@ void spi_cs_deactivate(struct spi_slave *slave)
void at91_udp_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
/* Enable PLLB */
writel(get_pllb_init(), &pmc->pllbr);
while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
at91_pllb_clk_enable(get_pllb_init());
/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
at91_periph_clk_enable(ATMEL_ID_UDP);
......
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