Commit 3e01ed00 authored by Khoronzhuk, Ivan's avatar Khoronzhuk, Ivan Committed by Tom Rini

mtd: nand: davinci: add header file for driver definitions

The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h and nand_defs.h to it.
Acked-by: default avatarVitaly Andrianov <vitalya@ti.com>
Signed-off-by: default avatarIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
[trini: Fixup more davinci breakage]
Signed-off-by: default avatarTom Rini <trini@ti.com>
parent 99907176
......@@ -14,7 +14,7 @@
#include <asm/arch/hardware.h>
#include <asm/arch/davinci_misc.h>
#include <asm/arch/ddr2_defs.h>
#include <asm/arch/emif_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/pll_defs.h>
void davinci_enable_uart0(void)
......
......@@ -11,6 +11,7 @@
#include <nand.h>
#include <ns16550.h>
#include <post.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/dm365_lowlevel.h>
#include <asm/arch/hardware.h>
......
......@@ -10,7 +10,7 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/emif_defs.h>
#include <asm/ti-common/davinci_nand.h>
#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
......
/*
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _EMIF_DEFS_H_
#define _EMIF_DEFS_H_
#include <asm/arch/hardware.h>
struct davinci_emif_regs {
u_int32_t ercsr;
u_int32_t awccr;
u_int32_t sdbcr;
u_int32_t sdrcr;
u_int32_t ab1cr;
u_int32_t ab2cr;
u_int32_t ab3cr;
u_int32_t ab4cr;
u_int32_t sdtimr;
u_int32_t ddrsr;
u_int32_t ddrphycr;
u_int32_t ddrphysr;
u_int32_t totar;
u_int32_t totactr;
u_int32_t ddrphyid_rev;
u_int32_t sdsretr;
u_int32_t eirr;
u_int32_t eimr;
u_int32_t eimsr;
u_int32_t eimcr;
u_int32_t ioctrlr;
u_int32_t iostatr;
u_int8_t rsvd0[8];
u_int32_t nandfcr;
u_int32_t nandfsr;
u_int8_t rsvd1[8];
u_int32_t nandfecc[4];
u_int8_t rsvd2[60];
u_int32_t nand4biteccload;
u_int32_t nand4bitecc[4];
u_int32_t nanderradd1;
u_int32_t nanderradd2;
u_int32_t nanderrval1;
u_int32_t nanderrval2;
};
#define davinci_emif_regs \
((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << (n-2))
#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4)
#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2)))
#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
#define DAVINCI_NANDFCR_CS2NAND (1 << 0)
/* Chip Select setup */
#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
#define DAVINCI_ABCR_WSETUP(n) (n << 26)
#define DAVINCI_ABCR_WSTROBE(n) (n << 20)
#define DAVINCI_ABCR_WHOLD(n) (n << 17)
#define DAVINCI_ABCR_RSETUP(n) (n << 13)
#define DAVINCI_ABCR_RSTROBE(n) (n << 7)
#define DAVINCI_ABCR_RHOLD(n) (n << 4)
#define DAVINCI_ABCR_TA(n) (n << 2)
#define DAVINCI_ABCR_ASIZE_16BIT 1
#define DAVINCI_ABCR_ASIZE_8BIT 0
#endif
......@@ -597,7 +597,6 @@ static inline enum davinci_clk_ids get_async3_src(void)
#if defined(CONFIG_SOC_DM365)
#include <asm/arch/aintc_defs.h>
#include <asm/arch/ddr2_defs.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pll_defs.h>
#include <asm/arch/psc_defs.h>
......
/*
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
*
* Parts shamelesly stolen from Linux Kernel source tree.
*
* ------------------------------------------------------------
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _NAND_DEFS_H_
#define _NAND_DEFS_H_
#include <asm/arch/hardware.h>
#ifdef CONFIG_SOC_DM646X
#define MASK_CLE 0x80000
#define MASK_ALE 0x40000
#else
#define MASK_CLE 0x10
#define MASK_ALE 0x08
#endif
#ifdef CONFIG_SYS_NAND_MASK_CLE
#undef MASK_CLE
#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
#endif
#ifdef CONFIG_SYS_NAND_MASK_ALE
#undef MASK_ALE
#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
#endif
#define NAND_READ_START 0x00
#define NAND_READ_END 0x30
#define NAND_STATUS 0x70
extern void davinci_nand_init(struct nand_chip *nand);
#endif
/*
* nand driver definitions to re-use davinci nand driver on Keystone2
*
* (C) Copyright 2012-2014
* Texas Instruments Incorporated, <www.ti.com>
* (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _NAND_DEFS_H_
#define _NAND_DEFS_H_
#include <asm/arch/hardware.h>
#include <linux/mtd/nand.h>
#define MASK_CLE 0x4000
#define MASK_ALE 0x2000
#define NAND_READ_START 0x00
#define NAND_READ_END 0x30
#define NAND_STATUS 0x70
#endif
#include <asm/arch-davinci/emif_defs.h>
......@@ -155,4 +155,6 @@ int wdt_kick(void);
#define INTC_HINT_EN (TNETV107X_INTC_BASE + 0x1500)
#define INTC_EN_CLR0 (TNETV107X_INTC_BASE + 0x380)
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE
#endif /* __ASM_ARCH_HARDWARE_H */
/*
* TNETV107X: NAND definitions
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _NAND_DEFS_H_
#define _NAND_DEFS_H_
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE TNETV107X_ASYNC_EMIF_CNTRL_BASE
#define MASK_CLE 0x4000
#define MASK_ALE 0x2000
#define NAND_READ_START 0x00
#define NAND_READ_END 0x30
#define NAND_STATUS 0x70
extern void davinci_nand_init(struct nand_chip *nand);
#endif
/*
* emif definitions to re-use davinci emif driver on Keystone2
* NAND Flash Driver
*
* (C) Copyright 2012-2014
* Texas Instruments Incorporated, <www.ti.com>
* (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
* Copyright (C) 2006-2014 Texas Instruments.
*
* SPDX-License-Identifier: GPL-2.0+
* Based on Linux DaVinci NAND driver by TI.
*/
#ifndef _EMIF_DEFS_H_
#define _EMIF_DEFS_H_
#ifndef _DAVINCI_NAND_H_
#define _DAVINCI_NAND_H_
#include <linux/mtd/nand.h>
#include <asm/arch/hardware.h>
#define NAND_READ_START 0x00
#define NAND_READ_END 0x30
#define NAND_STATUS 0x70
#define MASK_CLE 0x10
#define MASK_ALE 0x08
#ifdef CONFIG_SYS_NAND_MASK_CLE
#undef MASK_CLE
#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
#endif
#ifdef CONFIG_SYS_NAND_MASK_ALE
#undef MASK_ALE
#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
#endif
struct davinci_emif_regs {
uint32_t ercsr;
uint32_t awccr;
uint32_t sdbcr;
uint32_t sdrcr;
uint32_t abncr[4];
union {
uint32_t abncr[4];
uint32_t ab1cr;
uint32_t ab2cr;
uint32_t ab3cr;
uint32_t ab4cr;
};
uint32_t sdtimr;
uint32_t ddrsr;
uint32_t ddrphycr;
......@@ -56,18 +78,21 @@ struct davinci_emif_regs {
#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + ((n) - 2)))
#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
#define DAVINCI_NANDFCR_CS2NAND (1 << 0)
/* Chip Select setup */
#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
#define DAVINCI_ABCR_WSETUP(n) ((n) << 26)
#define DAVINCI_ABCR_WSTROBE(n) ((n) << 20)
#define DAVINCI_ABCR_WHOLD(n) ((n) << 17)
#define DAVINCI_ABCR_RSETUP(n) ((n) << 13)
#define DAVINCI_ABCR_RSTROBE(n) ((n) << 7)
#define DAVINCI_ABCR_RHOLD(n) ((n) << 4)
#define DAVINCI_ABCR_TA(n) ((n) << 2)
#define DAVINCI_ABCR_WSETUP(n) (n << 26)
#define DAVINCI_ABCR_WSTROBE(n) (n << 20)
#define DAVINCI_ABCR_WHOLD(n) (n << 17)
#define DAVINCI_ABCR_RSETUP(n) (n << 13)
#define DAVINCI_ABCR_RSTROBE(n) (n << 7)
#define DAVINCI_ABCR_RHOLD(n) (n << 4)
#define DAVINCI_ABCR_TA(n) (n << 2)
#define DAVINCI_ABCR_ASIZE_16BIT 1
#define DAVINCI_ABCR_ASIZE_8BIT 0
void davinci_nand_init(struct nand_chip *nand);
#endif
......@@ -20,7 +20,7 @@
#include <spi.h>
#include <spi_flash.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/pinmux_defs.h>
#include <asm/io.h>
......
......@@ -16,7 +16,7 @@
#include <netdev.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/nand_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/davinci_misc.h>
#ifdef CONFIG_DAVINCI_MMC
#include <mmc.h>
......
......@@ -25,12 +25,11 @@
#include <net.h>
#include <netdev.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/pinmux_defs.h>
#include <asm/io.h>
#include <nand.h>
#include <asm/arch/nand_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/davinci_misc.h>
#ifdef CONFIG_DAVINCI_MMC
......
......@@ -16,7 +16,7 @@
#include <spi.h>
#include <spi_flash.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/pinmux_defs.h>
#include <asm/io.h>
......
......@@ -8,8 +8,7 @@
#include <nand.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/nand_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/davinci_misc.h>
#include <net.h>
#include <netdev.h>
......
......@@ -9,7 +9,7 @@
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/gpio.h>
#include <asm/arch/nand_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/davinci_misc.h>
#include <net.h>
#include <netdev.h>
......
......@@ -8,8 +8,7 @@
#include <nand.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/nand_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/gpio.h>
#include <netdev.h>
#include <asm/arch/davinci_misc.h>
......
......@@ -8,7 +8,8 @@
#include <netdev.h>
#include <asm/io.h>
#include <nand.h>
#include <asm/arch/nand_defs.h>
#include <asm/arch/hardware.h>
#include <asm/ti-common/davinci_nand.h>
DECLARE_GLOBAL_DATA_PTR;
......
......@@ -19,7 +19,7 @@
#include <net.h>
#include <netdev.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/emac_defs.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
......
......@@ -14,7 +14,7 @@
#include <common.h>
#include <nand.h>
#include <asm/arch/nand_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/hardware.h>
#include <asm/arch/davinci_misc.h>
......
......@@ -29,7 +29,7 @@
#include <asm/io.h>
#include <asm/arch/da850_lowlevel.h>
#include <asm/arch/davinci_misc.h>
#include <asm/arch/emif_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux_defs.h>
......
......@@ -18,7 +18,7 @@
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/gpio.h>
#include <asm/arch/emif_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/pinmux_defs.h>
#include <asm/arch/davinci_misc.h>
......
......@@ -16,7 +16,6 @@
#include <asm/arch/clock.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/arch/nand_defs.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/psc_defs.h>
......
......@@ -11,7 +11,7 @@
#include <asm/arch/clock.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/arch/nand_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/mux.h>
DECLARE_GLOBAL_DATA_PTR;
......
......@@ -32,8 +32,7 @@
#include <common.h>
#include <asm/io.h>
#include <nand.h>
#include <asm/arch/nand_defs.h>
#include <asm/arch/emif_defs.h>
#include <asm/ti-common/davinci_nand.h>
/* Definitions for 4-bit hardware ECC */
#define NAND_TIMEOUT 10240
......
......@@ -78,6 +78,8 @@ extern unsigned int davinci_arm_clk_get(void);
#define CONFIG_SYS_NO_FLASH
#ifdef CONFIG_SYS_USE_NAND
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_MASK_CLE 0x80000
#define CONFIG_SYS_NAND_MASK_ALE 0x40000
#define CONFIG_SYS_NAND_CS 2
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_IS_IN_NAND
......
......@@ -136,6 +136,8 @@
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_MASK_CLE 0x4000
#define CONFIG_SYS_NAND_MASK_ALE 0x2000
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
......
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