Commit 3e38691e authored by wdenk's avatar wdenk

* Patch by Arun Dharankar, 4 Apr 2003:

  Add IDMA example code (tested on 8260 only)

* Add support for Purple Board (MIPS64 5Kc)

* Add support for MIPS64 5Kc CPUs

* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS

* Patch by Denis Peter, 04 Apr 2003:
  - update MIP405-4 board

* Patches by Denis Peter, 03 April 2003:
  - fix PCI IRQs on MPL boards
  - fix two more un-relocated pointer problems

* Fix behaviour of "run" command:
  - print error message iv variable does not exist
  - terminate processing of arguments in case of error

* Patches by Peter Figuli, 10 Mar 2003
  - Add support for BTUART on PXA platform
  - Add support for WEP EP250 (PXA) board

* Fix flash problems on INCA-IP; add tool to allow bruning images  to
  flash using a BDI2000

* Implement fix for I2C Edge Conditions problem for all boards that
  use the bit-banging driver (common/soft_i2c.c)

* Add patches by Robert Schwebel, 31 Mar 2003:
  - csb226 board: bring in sync with innokom/memsetup.S
  - csb226 board: fix MDREFR handling
  - misc doc fixes / extensions
  - innokom board: cleanup, MDREFR fix in memsetup.S, config update
  - add BOOT_PROGRESS to armlinux.c
parent 36c05a80
...@@ -2,12 +2,42 @@ ...@@ -2,12 +2,42 @@
Changes since U-Boot 0.2.2: Changes since U-Boot 0.2.2:
====================================================================== ======================================================================
* Patch by Arun Dharankar, 4 Apr 2003:
Add IDMA example code (tested on 8260 only)
* Add support for Purple Board (MIPS64 5Kc)
* Add support for MIPS64 5Kc CPUs
* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS
* Patch by Denis Peter, 04 Apr 2003:
- update MIP405-4 board
* Patch by Stefan Roese, 4 Apr 2003: * Patch by Stefan Roese, 4 Apr 2003:
- U-Boot version environment variable "ver" added - U-Boot version environment variable "ver" added
(CONFIG_VERSION_VARIABLE). (CONFIG_VERSION_VARIABLE).
- Changed PPC405GPr version from A to B. - Changed PPC405GPr version from A to B.
- Changed CPCI405 to use CTS instead of DSR on PPC405 UART1. - Changed CPCI405 to use CTS instead of DSR on PPC405 UART1.
* Patches by Denis Peter, 03 April 2003:
- fix PCI IRQs on MPL boards
- fix two more un-relocated pointer problems
* Fix behaviour of "run" command:
- print error message iv variable does not exist
- terminate processing of arguments in case of error
* Patches by Peter Figuli, 10 Mar 2003
- Add support for BTUART on PXA platform
- Add support for WEP EP250 (PXA) board
* Fix flash problems on INCA-IP; add tool to allow bruning images to
flash using a BDI2000
* Implement fix for I2C Edge Conditions problem for all boards that
use the bit-banging driver (common/soft_i2c.c)
* Patch by Martin Winistoerfer, 23 Mar 2003 * Patch by Martin Winistoerfer, 23 Mar 2003
- Add port to MPC555/556 microcontrollers - Add port to MPC555/556 microcontrollers
- Add support for cmi customer board with - Add support for cmi customer board with
...@@ -22,6 +52,11 @@ Changes since U-Boot 0.2.2: ...@@ -22,6 +52,11 @@ Changes since U-Boot 0.2.2:
* Add patches by Robert Schwebel, 31 Mar 2003: * Add patches by Robert Schwebel, 31 Mar 2003:
- add ctrl-c support for kermit download - add ctrl-c support for kermit download
- align bdinfo output on ARM - align bdinfo output on ARM
- csb226 board: bring in sync with innokom/memsetup.S
- csb226 board: fix MDREFR handling
- misc doc fixes / extensions
- innokom board: cleanup, MDREFR fix in memsetup.S, config update
- add BOOT_PROGRESS to armlinux.c
* Add CPU ID, version, and clock speed for INCA-IP * Add CPU ID, version, and clock speed for INCA-IP
......
...@@ -104,6 +104,10 @@ E: wg@denx.de ...@@ -104,6 +104,10 @@ E: wg@denx.de
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
W: www.denx.de W: www.denx.de
N: Peter Figuli
E: peposh@etc.sk
D: Support for WEP EP250 (PXA) board
N: Thomas Frieden N: Thomas Frieden
E: ThomasF@hyperion-entertainment.com E: ThomasF@hyperion-entertainment.com
D: Support for AmigaOne D: Support for AmigaOne
......
...@@ -241,6 +241,10 @@ Unknown / orphaned boards: ...@@ -241,6 +241,10 @@ Unknown / orphaned boards:
# Board CPU # # Board CPU #
######################################################################### #########################################################################
Peter Figuli <peposh@etc.sk>
wepep250 xscale
Marius Grger <mag@sysgo.de> Marius Grger <mag@sysgo.de>
impa7 ARM720T (EP7211) impa7 ARM720T (EP7211)
...@@ -296,6 +300,7 @@ Daniel Engstr ...@@ -296,6 +300,7 @@ Daniel Engstr
Wolfgang Denk <wd@denx.de> Wolfgang Denk <wd@denx.de>
incaip MIPS32 4Kc incaip MIPS32 4Kc
purple MIPS64 5Kc
######################################################################### #########################################################################
# End of MAINTAINERS list # # End of MAINTAINERS list #
......
...@@ -112,7 +112,7 @@ LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9" ...@@ -112,7 +112,7 @@ LIST_ARM9="at91rm9200dk smdk2400 smdk2410 trab VCMA9"
## Xscale Systems ## Xscale Systems
######################################################################### #########################################################################
LIST_xscale="cradle csb226 innokom lubbock" LIST_xscale="cradle csb226 innokom lubbock wepep250"
LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}" LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
...@@ -123,7 +123,9 @@ LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}" ...@@ -123,7 +123,9 @@ LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
LIST_mips4kc="incaip" LIST_mips4kc="incaip"
LIST_mips="${LIST_mips4kc}" LIST_mips5kc="purple"
LIST_mips="${LIST_mips4kc} ${LIST_mips5kc}"
#----- for now, just run PPC by default ----- #----- for now, just run PPC by default -----
......
...@@ -629,7 +629,6 @@ BAB7xx_config: unconfig ...@@ -629,7 +629,6 @@ BAB7xx_config: unconfig
ELPPC_config: unconfig ELPPC_config: unconfig
@./mkconfig $(@:_config=) ppc 74xx_7xx elppc eltec @./mkconfig $(@:_config=) ppc 74xx_7xx elppc eltec
#======================================================================== #========================================================================
# ARM # ARM
#======================================================================== #========================================================================
...@@ -699,6 +698,9 @@ innokom_config : unconfig ...@@ -699,6 +698,9 @@ innokom_config : unconfig
lubbock_config : unconfig lubbock_config : unconfig
@./mkconfig $(@:_config=) arm xscale lubbock @./mkconfig $(@:_config=) arm xscale lubbock
wepep250_config : unconfig
@./mkconfig $(@:_config=) arm xscale wepep250
#======================================================================== #========================================================================
# i386 # i386
#======================================================================== #========================================================================
...@@ -718,7 +720,11 @@ sc520_cdp_config : unconfig ...@@ -718,7 +720,11 @@ sc520_cdp_config : unconfig
incaip_config : unconfig incaip_config : unconfig
@./mkconfig $(@:_config=) mips mips incaip @./mkconfig $(@:_config=) mips mips incaip
purple_config : unconfig
@./mkconfig $(@:_config=) mips mips purple
#########################################################################
#########################################################################
clean: clean:
find . -type f \ find . -type f \
...@@ -726,7 +732,8 @@ clean: ...@@ -726,7 +732,8 @@ clean:
-o -name '*.o' -o -name '*.a' \) -print \ -o -name '*.o' -o -name '*.a' \) -print \
| xargs rm -f | xargs rm -f
rm -f examples/hello_world examples/timer \ rm -f examples/hello_world examples/timer \
examples/eepro100_eeprom examples/sched examples/eepro100_eeprom examples/sched \
examples/mem_to_mem_idma2intr
rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr rm -f tools/img2srec tools/mkimage tools/envcrc tools/gen_eth_addr
rm -f tools/easylogo/easylogo tools/bmp_logo rm -f tools/easylogo/easylogo tools/bmp_logo
rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
...@@ -741,7 +748,7 @@ clobber: clean ...@@ -741,7 +748,7 @@ clobber: clean
rm -fr *.*~ rm -fr *.*~
rm -f u-boot u-boot.bin u-boot.elf u-boot.srec u-boot.map System.map rm -f u-boot u-boot.bin u-boot.elf u-boot.srec u-boot.map System.map
rm -f tools/crc32.c tools/environment.c tools/env/crc32.c rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
rm -f cpu/mpc824x/bedbug_603e.c rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
rm -f include/asm/arch include/asm rm -f include/asm/arch include/asm
mrproper \ mrproper \
......
...@@ -1462,7 +1462,7 @@ following configurations: ...@@ -1462,7 +1462,7 @@ following configurations:
These settings describe a second storage area used to hold These settings describe a second storage area used to hold
a redundand copy of the environment data, so that there is a redundand copy of the environment data, so that there is
a valid backup copy in case there is a power failur during a valid backup copy in case there is a power failure during
a "saveenv" operation. a "saveenv" operation.
BE CAREFUL! Any changes to the flash layout, and some changes to the BE CAREFUL! Any changes to the flash layout, and some changes to the
......
...@@ -38,6 +38,9 @@ DRAM_SIZE: .long CFG_DRAM_SIZE ...@@ -38,6 +38,9 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
sub pc,pc,#4 sub pc,pc,#4
.endm .endm
_TEXT_BASE:
.word TEXT_BASE
/* /*
* Memory setup * Memory setup
...@@ -222,23 +225,28 @@ mem_init: ...@@ -222,23 +225,28 @@ mem_init:
/* Step 2c: Write FLYCNFG FIXME: what's that??? */ /* Step 2c: Write FLYCNFG FIXME: what's that??? */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* test if we run from flash or RAM - RAM/BDI: don't setup RAM */
adr r3, mem_init /* r0 <- current position of code */
ldr r2, =mem_init
cmp r3, r2 /* skip init if in place */
beq initirqs
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* Before accessing MDREFR we need a valid DRI field, so we set */ /* Before accessing MDREFR we need a valid DRI field, so we set */
/* this to power on defaults + DIR field. */ /* this to power on defaults + DRI field. */
ldr r4, =0x03ca4fff ldr r3, =CFG_MDREFR_VAL
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ ldr r2, =0xFFF
ldr r4, [r1, #MDREFR_OFFSET] and r3, r3, r2
ldr r4, =0x03ca4000
orr r4, r4, r3
ldr r4, =0x03ca4030
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
ldr r4, [r1, #MDREFR_OFFSET] ldr r4, [r1, #MDREFR_OFFSET]
/* Note: preserve the mdrefr value in r4 */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
...@@ -258,18 +266,16 @@ mem_init: ...@@ -258,18 +266,16 @@ mem_init:
/* Step 4: Initialize SDRAM */ /* Step 4: Initialize SDRAM */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* Step 4a: assert MDREFR:K1RUN and MDREFR:K2RUN and configure */ /* Step 4a: assert MDREFR:K?RUN and configure */
/* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */ /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */
orr r4, r4, #(MDREFR_K1RUN|MDREFR_K0RUN) ldr r4, =CFG_MDREFR_VAL
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ ldr r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
/* Step 4b: de-assert MDREFR:SLFRSH. */ /* Step 4b: de-assert MDREFR:SLFRSH. */
bic r4, r4, #(MDREFR_SLFRSH) bic r4, r4, #(MDREFR_SLFRSH)
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
ldr r4, [r1, #MDREFR_OFFSET] ldr r4, [r1, #MDREFR_OFFSET]
......
...@@ -10,7 +10,8 @@ ...@@ -10,7 +10,8 @@
* Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de> * Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de>
* *
* (C) Copyright 2002 * (C) Copyright 2002
* Kai-Uwe Bloem, GDS, <kai-uwe.bloem@auerswald.de> * Auerswald GmbH & Co KG, Germany
* Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de>
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
* project. * project.
......
...@@ -48,7 +48,7 @@ int i2c_init_board(void) ...@@ -48,7 +48,7 @@ int i2c_init_board(void)
icr = ICR; ICR &= ~(ICR_SCLE | ICR_IUE); icr = ICR; ICR &= ~(ICR_SCLE | ICR_IUE);
/* set gpio pin low _before_ we change direction to output */ /* set gpio pin low _before_ we change direction to output */
GPCR(70) = GPIO_bit(70); GPCR(70) = GPIO_bit(70);
/* now toggle between output=low and high-impedance */ /* now toggle between output=low and high-impedance */
for (i = 0; i < 20; i++) { for (i = 0; i < 20; i++) {
...@@ -100,13 +100,8 @@ int board_init (void) ...@@ -100,13 +100,8 @@ int board_init (void)
/* memory and cpu-speed are setup before relocation */ /* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */ /* so we do _nothing_ here */
/* arch number of Innokom board */
gd->bd->bi_arch_number = MACH_TYPE_INNOKOM; gd->bd->bi_arch_number = MACH_TYPE_INNOKOM;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0xa0000100; gd->bd->bi_boot_params = 0xa0000100;
/* baud rate */
gd->bd->bi_baudrate = CONFIG_BAUDRATE; gd->bd->bi_baudrate = CONFIG_BAUDRATE;
return 0; return 0;
......
...@@ -237,17 +237,16 @@ mem_init: ...@@ -237,17 +237,16 @@ mem_init:
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* Before accessing MDREFR we need a valid DRI field, so we set */ /* Before accessing MDREFR we need a valid DRI field, so we set */
/* this to power on defaults + DIR field. */ /* this to power on defaults + DRI field. */
ldr r4, =0x03ca4fff ldr r3, =CFG_MDREFR_VAL
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ ldr r2, =0xFFF
ldr r4, [r1, #MDREFR_OFFSET] and r3, r3, r2
ldr r4, =0x03ca4000
orr r4, r4, r3
ldr r4, =0x03ca4030
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
ldr r4, [r1, #MDREFR_OFFSET] ldr r4, [r1, #MDREFR_OFFSET]
/* Note: preserve the mdrefr value in r4 */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
...@@ -267,18 +266,16 @@ mem_init: ...@@ -267,18 +266,16 @@ mem_init:
/* Step 4: Initialize SDRAM */ /* Step 4: Initialize SDRAM */
/* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */
/* Step 4a: assert MDREFR:K1RUN and MDREFR:K2RUN and configure */ /* Step 4a: assert MDREFR:K?RUN and configure */
/* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */ /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */
orr r4, r4, #(MDREFR_K1RUN|MDREFR_K0RUN) ldr r4, =CFG_MDREFR_VAL
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ ldr r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
/* Step 4b: de-assert MDREFR:SLFRSH. */ /* Step 4b: de-assert MDREFR:SLFRSH. */
bic r4, r4, #(MDREFR_SLFRSH) bic r4, r4, #(MDREFR_SLFRSH)
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
ldr r4, [r1, #MDREFR_OFFSET] ldr r4, [r1, #MDREFR_OFFSET]
......
...@@ -65,21 +65,22 @@ void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev, ...@@ -65,21 +65,22 @@ void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev,
static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev) static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{ {
unsigned char int_line = 0xff; unsigned char int_line = 0xff;
unsigned char pin;
/* /*
* Write pci interrupt line register * Write pci interrupt line register
*/ */
if(PCI_DEV(dev)==0) /* Device0 = PPC405 -> skip */ if(PCI_DEV(dev)==0) /* Device0 = PPC405 -> skip */
return; return;
if(PCI_FUNC(dev)==0) pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
{ if ((pin == 0) || (pin > 4))
/* assuming all function 0 are using their INTA# Pin*/ return;
int_line=PCI_IRQ_VECTOR(dev);
pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line); int_line = ((PCI_DEV(dev) + (pin-1) + 10) % 4) + 28;
pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
#ifdef DEBUG #ifdef DEBUG
printf("Fixup IRQ: dev %d (%x) int line %d 0x%x\n", printf("Fixup IRQ: dev %d (%x) int line %d 0x%x\n",
PCI_DEV(dev),dev,int_line,int_line); PCI_DEV(dev),dev,int_line,int_line);
#endif #endif
}
} }
extern void pci_405gp_init(struct pci_controller *hose); extern void pci_405gp_init(struct pci_controller *hose);
...@@ -90,11 +91,34 @@ static struct pci_controller hose = { ...@@ -90,11 +91,34 @@ static struct pci_controller hose = {
fixup_irq: pci_pip405_fixup_irq, fixup_irq: pci_pip405_fixup_irq,
}; };
static void reloc_pci_cfg_table(struct pci_config_table *table)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long addr;
for (; table && table->vendor; table++) {
addr = (ulong) (table->config_device) + gd->reloc_off;
#ifdef DEBUG
printf ("device \"%d\": 0x%08lx => 0x%08lx\n",
table->device, (ulong) (table->config_device), addr);
#endif
table->config_device =
(void (*)(struct pci_controller* hose, pci_dev_t dev,
struct pci_config_table *))addr;
table->priv[0]+=gd->reloc_off;
}
}
void pci_init_board(void) void pci_init_board(void)
{ {
/*we want the ptrs to RAM not flash (ie don't use init list)*/ /*we want the ptrs to RAM not flash (ie don't use init list)*/
hose.fixup_irq = pci_pip405_fixup_irq; hose.fixup_irq = pci_pip405_fixup_irq;
hose.config_table = pci_pip405_config_table; hose.config_table = pci_pip405_config_table;
reloc_pci_cfg_table(hose.config_table);
#ifdef DEBUG
printf("Init PCI: fixup_irq=%p config_table=%p hose=%p\n",pci_pip405_fixup_irq,pci_pip405_config_table,hose);
#endif
pci_405gp_init(&hose); pci_405gp_init(&hose);
} }
......
...@@ -128,6 +128,15 @@ const sdram_t sdram_table[] = { ...@@ -128,6 +128,15 @@ const sdram_t sdram_table[] = {
2, /* Address Mode = 2 */ 2, /* Address Mode = 2 */
4, /* size value */ 4, /* size value */
1}, /* ECC enabled */ 1}, /* ECC enabled */
{ 0x03, /* Rev A, 128MByte -4 Board */
3, /* Case Latenty = 3 */
3, /* trp 20ns / 7.5 ns datain[27] */
3, /* trcd 20ns /7.5 ns (datain[29]) */
6, /* tras 44ns /7.5 ns (datain[30]) */
4, /* tcpt 44 - 20ns = 24ns */
3, /* Address Mode = 3 */
5, /* size value */
1}, /* ECC enabled */
{ 0xff, /* terminator */ { 0xff, /* terminator */
0xff, 0xff,
0xff, 0xff,
...@@ -616,9 +625,15 @@ void print_mip405_rev (void) ...@@ -616,9 +625,15 @@ void print_mip405_rev (void)
int last_stage_init (void) int last_stage_init (void)
{ {
/* write correct LED configuration */
if (miiphy_write (0x1, 0x14, 0x2402) != 0) { if (miiphy_write (0x1, 0x14, 0x2402) != 0) {
printf ("Error writing to the PHY\n"); printf ("Error writing to the PHY\n");
} }
/* since LED/CFG2 is not connected on the -2,
* write to correct capability information */
if (miiphy_write (0x1, 0x4, 0x01E1) != 0) {
printf ("Error writing to the PHY\n");
}
print_mip405_rev (); print_mip405_rev ();
show_stdio_dev (); show_stdio_dev ();
check_env (); check_env ();
......
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
ppc/ppcstring.o (.text)
ppc/vsprintf.o (.text)
ppc/crc32.o (.text)
ppc/zlib.o (.text)
. = env_offset;
common/environment.o(.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
ppc/vsprintf.o (.text)
ppc/crc32.o (.text)
. = env_offset;
common/environment.o(.text)