Commit 3f843551 authored by Ian Campbell's avatar Ian Campbell Committed by Albert ARIBAUD

kirkwood_spi: correct access to irq_mask register

Problem appears to have been present since day one but masked because alignment
aborts were not enabled. ca4b5580 "arm, arm926ejs: always do cpu critical
inits" turned on alignment aborts and uncovered this latent problem.
Signed-off-by: default avatarIan Campbell <ijc@hellion.org.uk>
Acked-By: default avatarJason Cooper <u-boot@lakedaemon.net>
Tested-By: default avatarHolger Brunck <holger.brunck@keymile.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
parent 3d3206f1
......@@ -66,7 +66,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
debug("data = 0x%08x \n", data);
writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
writel(KWSPI_IRQMASK, spireg->irq_mask);
writel(KWSPI_IRQMASK, &spireg->irq_mask);
/* program mpp registers to select SPI_CSn */
if (cs) {
......
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