Commit 434f2cfc authored by pekon gupta's avatar pekon gupta Committed by Tom Rini

ARM: omap: move board specific NAND configs out from ti_armv7_common.h

This patch moves some board specific NAND configs:
- FROM: generic config file 'ti_armv7_common.h'
- TO:   individual board config files using these configs.
So that each board can independently set the value as per its design.

Following configs are affected in this patch:
  CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand>
  CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon>
  CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon>
  CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon>

This patch also updates documentation for few of above NAND configs.
Signed-off-by: 's avatarPekon Gupta <pekon@ti.com>
parent 222a3113
......@@ -89,6 +89,10 @@ Commands:
Configuration Options:
CONFIG_SYS_NAND_U_BOOT_OFFS
NAND Offset from where SPL will read u-boot image. This is the starting
address of u-boot MTD partition in NAND.
CONFIG_CMD_NAND
Enables NAND support and commmands.
......@@ -226,6 +230,14 @@ Platform specific options
detection. However ECC calculation on such plaforms would still be
done by GPMC controller.
CONFIG_SPL_NAND_AM33XX_BCH
Enables SPL-NAND driver (am335x_spl_bch.c) which supports ELM based
hardware ECC correction. This is useful for platforms which have ELM
hardware engine and use NAND boot mode.
Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
SPL-NAND driver with software ECC correction support.
CONFIG_NAND_OMAP_ECCSCHEME
On OMAP platforms, this CONFIG specifies NAND ECC scheme.
It can take following values:
......
......@@ -254,6 +254,11 @@
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif
#endif
......
......@@ -150,6 +150,11 @@
#define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x400000 /* un-assigned: (using dtb) */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/* GPIO pin + bank to pin ID mapping */
#define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin)
......
......@@ -303,5 +303,11 @@
#define CONFIG_SYS_NAND_ECCBYTES 3
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
......@@ -196,6 +196,13 @@
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 3
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif
#endif /* __IGEP00X0_H */
......@@ -216,5 +216,11 @@
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
......@@ -70,6 +70,12 @@
"4m(kernel),-(fs)"
#if defined(CONFIG_CMD_NAND)
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
#endif
......
......@@ -159,6 +159,12 @@
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* un-assigned */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/*
* USB configuration. We enable MUSB support, both for host and for
......
......@@ -243,13 +243,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
/* NAND */
#ifdef CONFIG_NAND
#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/* spl export command */
#define CONFIG_CMD_SPL
#endif
......@@ -275,7 +268,6 @@
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_MTD_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#endif
#endif /* !CONFIG_NOR_BOOT */
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment