Commit 4593637b authored by York Sun's avatar York Sun

powerpc: P2020: Remove macro CONFIG_P2020

Replace CONFIG_P2020 with ARCH_P2020 in Kconfig and clean up
existing macros.
Signed-off-by: default avatarYork Sun <york.sun@nxp.com>
parent 4167a67d
......@@ -162,6 +162,7 @@ config TARGET_P2020RDB
bool "Support P2020RDB-PC"
select SUPPORT_SPL
select SUPPORT_TPL
select ARCH_P2020
config TARGET_P1_TWR
bool "Support p1_twr"
......@@ -232,6 +233,7 @@ config TARGET_XPEDITE537X
config TARGET_XPEDITE550X
bool "Support xpedite550x"
select ARCH_P2020
config TARGET_UCP1020
bool "Support uCP1020"
......@@ -306,6 +308,9 @@ config ARCH_P1024
config ARCH_P1025
bool
config ARCH_P2020
bool
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
......
......@@ -81,7 +81,7 @@ obj-$(CONFIG_ARCH_P1023) += p1023_serdes.o
obj-$(CONFIG_ARCH_P1024) += p1021_serdes.o
obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o
obj-$(CONFIG_P2010) += p2020_serdes.o
obj-$(CONFIG_P2020) += p2020_serdes.o
obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o
obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
obj-$(CONFIG_PPC_P3041) += p3041_serdes.o
obj-$(CONFIG_PPC_P4080) += p4080_serdes.o
......
......@@ -295,7 +295,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A005125
#elif defined(CONFIG_P2020)
#elif defined(CONFIG_ARCH_P2020)
#define CONFIG_MAX_CPUS 2
#define CONFIG_SYS_FSL_NUM_LAWS 12
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
......
......@@ -85,7 +85,7 @@ enum law_trgt_if {
#if defined(CONFIG_ARCH_BSC9131) || defined(CONFIG_ARCH_BSC9132)
LAW_TRGT_IF_OCN_DSP = 0x03,
#else
#if !defined(CONFIG_ARCH_MPC8572) && !defined(CONFIG_P2020)
#if !defined(CONFIG_ARCH_MPC8572) && !defined(CONFIG_ARCH_P2020)
LAW_TRGT_IF_PCIE_3 = 0x03,
#endif
#endif
......@@ -121,7 +121,7 @@ enum law_trgt_if {
#define LAW_TRGT_IF_PCIE_1 LAW_TRGT_IF_PCI
#endif
#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_P2020)
#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020)
#define LAW_TRGT_IF_PCIE_3 LAW_TRGT_IF_PCI
#endif
#endif /* CONFIG_FSL_CORENET */
......
......@@ -2940,7 +2940,7 @@ struct ccsr_pman {
#define CONFIG_SYS_MPC85xx_PCIX2_OFFSET 0x9000
#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0xa000
#define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x9000
#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_P2020)
#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020)
#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000
#else
#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000
......
......@@ -8,7 +8,7 @@
obj-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o
obj-$(CONFIG_ARCH_MPC8572) += fsl_8xxx_clk.o
obj-$(CONFIG_MPC86xx) += fsl_8xxx_clk.o
obj-$(CONFIG_P2020) += fsl_8xxx_clk.o
obj-$(CONFIG_ARCH_P2020) += fsl_8xxx_clk.o
obj-$(CONFIG_MPC85xx) += fsl_8xxx_misc.o board.o
obj-$(CONFIG_MPC86xx) += fsl_8xxx_misc.o board.o
obj-$(CONFIG_NAND_ACTL) += actl_nand.o
......@@ -22,7 +22,7 @@ unsigned long get_board_sys_clk(ulong dummy)
if (in_be32(&gur->gpporcr) & 0x10000)
return 66666666;
else
#ifdef CONFIG_P2020
#ifdef CONFIG_ARCH_P2020
return 100000000;
#else
return 50000000;
......@@ -42,7 +42,7 @@ unsigned long get_board_ddr_clk(ulong dummy)
if (ddr_ratio == 0x7)
return get_board_sys_clk(dummy);
#ifdef CONFIG_P2020
#ifdef CONFIG_ARCH_P2020
if (in_be32(&gur->gpporcr) & 0x20000)
return 66666666;
else
......
......@@ -144,7 +144,6 @@
#if defined(CONFIG_TARGET_P2020RDB)
#define CONFIG_BOARDNAME "P2020RDB-PC"
#define CONFIG_NAND_FSL_ELBC
#define CONFIG_P2020
#define CONFIG_VSC7385_ENET
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0xc8
......
......@@ -16,7 +16,6 @@
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_P2020 1
#define CONFIG_XPEDITE550X 1
#define CONFIG_SYS_BOARD_NAME "XPedite5500"
#define CONFIG_SYS_FORM_PMC_XMC 1
......
......@@ -3383,7 +3383,6 @@ CONFIG_OS2_ENV_ADDR
CONFIG_OS_ENV_ADDR
CONFIG_OTHBOOTARGS
CONFIG_OVERWRITE_ETHADDR_ONCE
CONFIG_P2020
CONFIG_P2041RDB
CONFIG_P3041DS
CONFIG_P4080DS
......
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