Commit 506f3918 authored by Heiko Schocher's avatar Heiko Schocher Committed by Wolfgang Denk

8xx, icache: enabling ICache not before running from RAM

with the new CONFIG_SYS_DELAYED_ICACHE config option, ICache
is not enabled before code runs from RAM.
Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
parent cabf7b9c
......@@ -318,6 +318,11 @@ The following options need to be configured:
that this requires a (stable) reference clock (32 kHz
RTC clock or CONFIG_SYS_8XX_XIN)
CONFIG_SYS_DELAYED_ICACHE
Define this option if you want to enable the
ICache only when Code runs from RAM.
- Intel Monahans options:
CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
......
......@@ -142,7 +142,7 @@ boot_warm:
lis r3, IDC_DISABLE@h /* Disable data cache */
mtspr DC_CST, r3
#if !(defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM))
#if !defined(CONFIG_SYS_DELAYED_ICACHE)
/* On IP860 and PCU E,
* we cannot enable IC yet
*/
......
......@@ -173,6 +173,9 @@
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before
* running in RAM.
*/
/*-----------------------------------------------------------------------
* SYPCR - System Protection Control 11-9
......
......@@ -209,6 +209,9 @@
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before
* running in RAM.
*/
/*-----------------------------------------------------------------------
* SYPCR - System Protection Control 11-9
......
......@@ -246,6 +246,9 @@
*/
#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before
* running in RAM.
*/
/*-----------------------------------------------------------------------
* SYPCR - System Protection Control 11-9
......
......@@ -736,8 +736,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
WATCHDOG_RESET();
#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83XX)
icache_enable (); /* it's time to enable the instruction cache */
#endif
......
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