Commit 5344cc1a authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Tom Rini

powerpc: ppc4xx: remove PPChameleonEVB, CATcenter boards

These boards are still non-generic boards.

It is a good thing that we can drop board-specific hack code
from drivers/mtd/nand/nand_base.c
Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: default avatarStefan Roese <sr@denx.de>
Cc: Andrea "llandre" Marson <andrea.marson@dave-tech.it>
parent 168dcc6c
......@@ -101,12 +101,6 @@ config TARGET_FX12MM
config TARGET_V5FX30TEVAL
bool "Support v5fx30teval"
config TARGET_CATCENTER
bool "Support CATcenter"
config TARGET_PPCHAMELEONEVB
bool "Support PPChameleonEVB"
config TARGET_CPCI2DP
bool "Support CPCI2DP"
......@@ -199,7 +193,6 @@ source "board/avnet/fx12mm/Kconfig"
source "board/avnet/v5fx30teval/Kconfig"
source "board/csb272/Kconfig"
source "board/csb472/Kconfig"
source "board/dave/PPChameleonEVB/Kconfig"
source "board/esd/cpci2dp/Kconfig"
source "board/esd/cpci405/Kconfig"
source "board/esd/plu405/Kconfig"
......
if TARGET_CATCENTER
config SYS_BOARD
default "PPChameleonEVB"
config SYS_VENDOR
default "dave"
config SYS_CONFIG_NAME
default "CATcenter"
endif
if TARGET_PPCHAMELEONEVB
config SYS_BOARD
default "PPChameleonEVB"
config SYS_VENDOR
default "dave"
config SYS_CONFIG_NAME
default "PPChameleonEVB"
endif
PPCHAMELEONEVB BOARD
#M: -
S: Maintained
F: board/dave/PPChameleonEVB/
F: include/configs/CATcenter.h
F: configs/CATcenter_defconfig
F: configs/CATcenter_25_defconfig
F: configs/CATcenter_33_defconfig
PPCHAMELEONEVB BOARD
M: Andrea "llandre" Marson <andrea.marson@dave-tech.it>
S: Maintained
F: include/configs/PPChameleonEVB.h
F: configs/PPChameleonEVB_defconfig
F: configs/PPChameleonEVB_BA_25_defconfig
F: configs/PPChameleonEVB_BA_33_defconfig
F: configs/PPChameleonEVB_HI_25_defconfig
F: configs/PPChameleonEVB_HI_33_defconfig
F: configs/PPChameleonEVB_ME_25_defconfig
F: configs/PPChameleonEVB_ME_33_defconfig
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y = PPChameleonEVB.o flash.o nand.o
/*
* (C) Copyright 2003
* DAVE Srl
* http://www.dave-tech.it
* http://www.wawnet.biz
* mailto:info@wawnet.biz
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/processor.h>
#include <command.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
int board_early_init_f (void)
{
out32(GPIO0_OR, CONFIG_SYS_NAND0_CE); /* set initial outputs */
out32(GPIO0_OR, CONFIG_SYS_NAND1_CE); /* set initial outputs */
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
* IRQ 16 405GP internally generated; active low; level sensitive
* IRQ 17-24 RESERVED
* IRQ 25 (EXT IRQ 0)
* IRQ 26 (EXT IRQ 1)
* IRQ 27 (EXT IRQ 2)
* IRQ 28 (EXT IRQ 3)
* IRQ 29 (EXT IRQ 4)
* IRQ 30 (EXT IRQ 5)
* IRQ 31 (EXT IRQ 6)
*/
mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
mtdcr(UIC0ER, 0x00000000); /* disable all ints */
mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/
mtdcr(UIC0PR, 0xFFFFFF80); /* set int polarities */
mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/
mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
/*
* EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
*/
#if 1 /* test-only */
mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
#else
mtebc (EBC0_CFG, 0x28400000); /* ebc in high-z */
#endif
return 0;
}
/* ------------------------------------------------------------------------- */
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
extern flash_info_t flash_info[]; /* info for FLASH chips */
int misc_init_r (void)
{
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart = 0 - flash_info[0].size;
gd->bd->bi_flashoffset= flash_info[0].size - CONFIG_SYS_MONITOR_LEN;
#if 0
volatile unsigned short *fpga_mode =
(unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL);
volatile unsigned char *duart0_mcr =
(unsigned char *)((ulong)DUART0_BA + 4);
volatile unsigned char *duart1_mcr =
(unsigned char *)((ulong)DUART1_BA + 4);
bd_t *bd = gd->bd;
char * tmp; /* Temporary char pointer */
unsigned char *dst;
ulong len = sizeof(fpgadata);
int status;
int index;
int i;
unsigned long CPC0_CR0Reg;
dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
printf ("GUNZIP ERROR - must RESET board to recover\n");
do_reset (NULL, 0, 0, NULL);
}
status = fpga_boot(dst, len);
if (status != 0) {
printf("\nFPGA: Booting failed ");
switch (status) {
case ERROR_FPGA_PRG_INIT_LOW:
printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
break;
case ERROR_FPGA_PRG_INIT_HIGH:
printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
break;
case ERROR_FPGA_PRG_DONE:
printf("(Timeout: DONE not high after programming FPGA)\n ");
break;
}
/* display infos on fpgaimage */
index = 15;
for (i=0; i<4; i++) {
len = dst[index];
printf("FPGA: %s\n", &(dst[index+1]));
index += len+3;
}
putc ('\n');
/* delayed reboot */
for (i=20; i>0; i--) {
printf("Rebooting in %2d seconds \r",i);
for (index=0;index<1000;index++)
udelay(1000);
}
putc ('\n');
do_reset(NULL, 0, 0, NULL);
}
puts("FPGA: ");
/* display infos on fpgaimage */
index = 15;
for (i=0; i<4; i++) {
len = dst[index];
printf("%s ", &(dst[index+1]));
index += len+3;
}
putc ('\n');
free(dst);
/*
* Reset FPGA via FPGA_DATA pin
*/
SET_FPGA(FPGA_PRG | FPGA_CLK);
udelay(1000); /* wait 1ms */
SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
udelay(1000); /* wait 1ms */
#endif
#if 0
/*
* Enable power on PS/2 interface
*/
*fpga_mode |= CONFIG_SYS_FPGA_CTRL_PS2_RESET;
/*
* Enable interrupts in exar duart mcr[3]
*/
*duart0_mcr = 0x08;
*duart1_mcr = 0x08;
#endif
return (0);
}
/*
* Check Board Identity:
*/
int checkboard (void)
{
char str[64];
int i = getenv_f("serial#", str, sizeof(str));
puts ("Board: ");
if (i == -1) {
puts ("### No HW ID - assuming PPChameleonEVB");
} else {
puts(str);
}
putc ('\n');
return 0;
}
/* ------------------------------------------------------------------------- */
int testdram (void)
{
/* TODO: XXX XXX XXX */
printf ("test: 16 MB - ok\n");
return (0);
}
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CFB_CONSOLE
# ifdef CONFIG_CONSOLE_EXTRA_INFO
# include <video_fb.h>
extern GraphicDevice smi;
void video_get_info_str (int line_number, char *info)
{
uint pvr = get_pvr ();
/* init video info strings for graphic console */
switch (line_number) {
case 1:
switch (pvr) {
case PVR_405EP_RB:
sprintf (info, " AMCC PowerPC 405EP Rev. B");
break;
default:
sprintf (info, " AMCC PowerPC 405EP Rev. <unknown>");
break;
}
return;
case 2:
sprintf (info, " DAVE Srl PPChameleonEVB - www.dave-tech.it");
return;
case 3:
sprintf (info, " %s", smi.modeIdent);
return;
}
/* no more info lines */
*info = 0;
return;
}
# endif /* CONFIG_CONSOLE_EXTRA_INFO */
#endif /* CONFIG_CFB_CONSOLE */
/*
* (C) Copyright 2001
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/ppc4xx.h>
#include <asm/processor.h>
/*
* include common flash code (for esd boards)
*/
#include "../common/flash.c"
/*-----------------------------------------------------------------------
* Functions
*/
static ulong flash_get_size (vu_long * addr, flash_info_t * info);
static void flash_get_offsets (ulong base, flash_info_t * info);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
#ifdef __DEBUG_START_FROM_SRAM__
return CONFIG_SYS_DUMMY_FLASH_SIZE;
#else
unsigned long size;
int i;
uint pbcr;
unsigned long base;
int size_val = 0;
debug("[%s, %d] Entering ...\n", __FUNCTION__, __LINE__);
debug("[%s, %d] flash_info = 0x%p ...\n", __func__, __LINE__,
flash_info);
/* Init: no FLASHes known */
for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
debug("[%s, %d] Calling flash_get_size ...\n", __FUNCTION__, __LINE__);
size = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size, size<<20);
}
debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__);
/* Setup offsets */
flash_get_offsets (-size, &flash_info[0]);
debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__);
/* Re-do sizing to get full correct info */
mtdcr(EBC0_CFGADDR, PB0CR);
pbcr = mfdcr(EBC0_CFGDATA);
mtdcr(EBC0_CFGADDR, PB0CR);
base = -size;
switch (size) {
case 1 << 20:
size_val = 0;
break;
case 2 << 20:
size_val = 1;
break;
case 4 << 20:
size_val = 2;
break;
case 8 << 20:
size_val = 3;
break;
case 16 << 20:
size_val = 4;
break;
}
pbcr = (pbcr & 0x0001ffff) | base | (size_val << 17);
mtdcr(EBC0_CFGDATA, pbcr);
debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__);
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
-CONFIG_SYS_MONITOR_LEN,
0xffffffff,
&flash_info[0]);
debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__);
flash_info[0].size = size;
return (size);
#endif
}
/*
* (C) Copyright 2006 DENX Software Engineering
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#if defined(CONFIG_CMD_NAND)
#include <nand.h>
/*
* hardware specific access to control-lines
* function borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
*/
static void ppchameleonevb_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *this = mtd->priv;
ulong base = (ulong) this->IO_ADDR_W;
if (ctrl & NAND_CTRL_CHANGE) {
if ( ctrl & NAND_CLE )
MACRO_NAND_CTL_SETCLE((unsigned long)base);
else
MACRO_NAND_CTL_CLRCLE((unsigned long)base);
if ( ctrl & NAND_ALE )
MACRO_NAND_CTL_CLRCLE((unsigned long)base);
else
MACRO_NAND_CTL_CLRALE((unsigned long)base);
if ( ctrl & NAND_NCE )
MACRO_NAND_ENABLE_CE((unsigned long)base);
else
MACRO_NAND_DISABLE_CE((unsigned long)base);
}
if (cmd != NAND_CMD_NONE)
writeb(cmd, this->IO_ADDR_W);
}
/*
* read device ready pin
* function +/- borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
*/
static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo)
{
struct nand_chip *this = mtdinfo->priv;
ulong rb_gpio_pin;
/* use the base addr to find out which chip are we dealing with */
switch((ulong) this->IO_ADDR_W) {
case CONFIG_SYS_NAND0_BASE:
rb_gpio_pin = CONFIG_SYS_NAND0_RDY;
break;
case CONFIG_SYS_NAND1_BASE:
rb_gpio_pin = CONFIG_SYS_NAND1_RDY;
break;
default: /* this should never happen */
return 0;
break;
}
if (in32(GPIO0_IR) & rb_gpio_pin)
return 1;
return 0;
}
/*
* Board-specific NAND initialization. The following members of the
* argument are board-specific (per include/linux/mtd/nand.h):
* - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
* - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
* - cmd_ctrl: hardwarespecific function for accesing control-lines
* - dev_ready: hardwarespecific function for accesing device ready/busy line
* - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
* only be provided if a hardware ECC is available
* - ecc.mode: mode of ecc, see defines
* - chip_delay: chip dependent delay for transfering data from array to
* read regs (tR)
* - options: various chip options. They can partly be set to inform
* nand_scan about special functionality. See the defines for further
* explanation
* Members with a "?" were not set in the merged testing-NAND branch,
* so they are not set here either.
*/
int board_nand_init(struct nand_chip *nand)
{
nand->cmd_ctrl = ppchameleonevb_hwcontrol;
nand->dev_ready = ppchameleonevb_device_ready;
nand->ecc.mode = NAND_ECC_SOFT;
nand->chip_delay = NAND_BIG_DELAY_US;
nand->options = NAND_SAMSUNG_LP_OPTIONS;
return 0;
}
#endif
/*
* Copyright 2007-2009 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "config.h"
#ifndef RESET_VECTOR_ADDRESS
#define RESET_VECTOR_ADDRESS 0xfffffffc
#endif
OUTPUT_ARCH(powerpc)
PHDRS
{
text PT_LOAD;
bss PT_LOAD;
}
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.text :
{
*(.text*)
} :text
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
} :text
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
_GOT2_TABLE_ = .;
KEEP(*(.got2))
KEEP(*(.got))
PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
_FIXUP_TABLE_ = .;
KEEP(*(.fixup))
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
.data :
{
*(.data*)
*(.sdata*)
}
_edata = .;
PROVIDE (edata = .);
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified.");
. = 0xFFFF8000;
.ppcenv :
{
common/env_embedded.o(.ppcenv);
}
.resetvec RESET_VECTOR_ADDRESS :
{
KEEP(*(.resetvec))
} :text = 0xffff
. = RESET_VECTOR_ADDRESS + 0x4;
/*
* Make sure that the bss segment isn't linked at 0x0, otherwise its
* address won't be updated during relocation fixups. Note that
* this is a temporary fix. Code to dynamically the fixup the bss
* location will be added in the future. When the bss relocation
* fixup code is present this workaround should be removed.
*/
#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
. |= 0x10;
#endif
__bss_start = .;
.bss (NOLOAD) :
{
*(.bss*)
*(.sbss*)
*(COMMON)
} :bss
. = ALIGN(4);
__bss_end = . ;
PROVIDE (end = .);
}
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CATCENTER=y
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CATCENTER=y
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=1"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_CATCENTER=y
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_25"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PPCHAMELEONEVB=y
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_33"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PPCHAMELEONEVB=y
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_25"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PPCHAMELEONEVB=y
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_33"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PPCHAMELEONEVB=y
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PPCHAMELEONEVB=y
CONFIG_SYS_EXTRA_OPTIONS="PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33"
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PPCHAMELEONEVB=y
CONFIG_PPC=y
CONFIG_4xx=y
CONFIG_TARGET_PPCHAMELEONEVB=y
......@@ -12,6 +12,8 @@ The list should be sorted in reverse chronological order.
Board Arch CPU Commit Removed Last known maintainer/contact
=================================================================================================
CATcenter powerpc ppc4xx - -
PPChameleonEVB powerpc ppc4xx - - Andrea "llandre" Marson <andrea.marson@dave-tech.it>
P2020DS powerpc mpc85xx - -
P2020COME powerpc mpc85xx - - Ira W. Snyder <iws@ovro.caltech.edu>
P2020RDB powerpc mpc85xx - - Poonam Aggrwal <poonam.aggrwal@freescale.com>
......
......@@ -1065,11 +1065,6 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
}
}
#endif
#ifdef PPCHAMELON_NAND_TIMER_HACK
time_start = get_timer(0);
while (get_timer(time_start) < 10)
;
#endif /* PPCHAMELON_NAND_TIMER_HACK */
led_trigger_event(nand_led_trigger, LED_OFF);
status = (int)chip->read_byte(mtd);
......
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