Commit 581d92ee authored by Cliff Cai's avatar Cliff Cai Committed by Mike Frysinger

Blackfin: bfin_spi: round up clock divider

If the requested clock cannot be exactly obtained, round it up so that we
err on the side of slightly slower rather than slightly faster.
Signed-off-by: 's avatarCliff Cai <cliff.cai@analog.com>
Signed-off-by: 's avatarMike Frysinger <vapier@gentoo.org>
parent a52ad4f9
......@@ -85,6 +85,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct bfin_spi_slave *bss;
ulong sclk;
u32 mmr_base;
u32 baud;
......@@ -105,7 +106,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
default: return NULL;
}
baud = get_sclk() / (2 * max_hz);
sclk = get_sclk();
baud = sclk / (2 * max_hz);
/* baud should be rounded up */
if (sclk % (2 * max_hz))
baud += 1;
if (baud < 2)
baud = 2;
else if (baud > (u16)-1)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment