Commit 59e4be94 authored by Mike Frysinger's avatar Mike Frysinger

Blackfin: cm-bf527: new board port

Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 8b219cf0
......@@ -874,6 +874,7 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
CM-BF527 BF527
CM-BF533 BF533
CM-BF537E BF537
CM-BF548 BF548
......
......@@ -806,6 +806,7 @@ LIST_blackfin=" \
bf538f-ezkit \
bf548-ezkit \
bf561-ezkit \
cm-bf527 \
cm-bf533 \
cm-bf537e \
cm-bf548 \
......
......@@ -3391,7 +3391,7 @@ BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \
bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
# Bluetechnix tinyboards
BFIN_BOARDS += cm-bf533 cm-bf537e cm-bf548 cm-bf561 tcm-bf537
BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf548 cm-bf561 tcm-bf537
$(BFIN_BOARDS:%=%_config) : unconfig
@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
......@@ -3567,7 +3567,7 @@ clean:
$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
$(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \
$(obj)board/bf5{33,37}-stamp/u-boot.lds \
$(obj)board/{,t}cm-bf5{33,37e,48,61}/u-boot.lds \
$(obj)board/{,t}cm-bf5{27,33,37e,48,61}/u-boot.lds \
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
......
#
# U-boot - Makefile
#
# Copyright (c) 2005-2008 Analog Device Inc.
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y := $(BOARD).o gpio.o gpio_cfi_flash.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
/*
* U-boot - main board file
*
* Copyright (c) 2005-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <config.h>
#include <net.h>
#include <netdev.h>
#include <asm/blackfin.h>
#include <asm/net.h>
#include <asm/mach-common/bits/otp.h>
#include "gpio_cfi_flash.h"
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
printf("Board: Bluetechnix CM-BF527 board\n");
printf(" Support: http://www.bluetechnix.at/\n");
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
#ifdef CONFIG_BFIN_MAC
static void board_init_enetaddr(uchar *mac_addr)
{
bool valid_mac = false;
/* the MAC is stored in OTP memory page 0xDF */
uint32_t ret;
uint64_t otp_mac;
ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
if (!(ret & OTP_MASTER_ERROR)) {
uchar *otp_mac_p = (uchar *)&otp_mac;
for (ret = 0; ret < 6; ++ret)
mac_addr[ret] = otp_mac_p[5 - ret];
if (is_valid_ether_addr(mac_addr))
valid_mac = true;
}
if (!valid_mac) {
puts("Warning: Generating 'random' MAC address\n");
bfin_gen_rand_mac(mac_addr);
}
eth_setenv_enetaddr("ethaddr", mac_addr);
}
int board_eth_init(bd_t *bis)
{
return bfin_EMAC_initialize(bis);
}
#endif
int misc_init_r(void)
{
#ifdef CONFIG_BFIN_MAC
uchar enetaddr[6];
if (!eth_getenv_enetaddr("ethaddr", enetaddr))
board_init_enetaddr(enetaddr);
#endif
gpio_cfi_flash_init();
return 0;
}
#
# Copyright (c) 2005-2008 Analog Device Inc.
#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
/*
* Control GPIO pins on the fly
*
* Copyright (c) 2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <command.h>
#include <asm/blackfin.h>
int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
if (argc != 3) {
show_usage:
printf("Usage:\n%s\n", cmdtp->usage);
return 1;
}
/* parse the behavior */
ulong port_cmd = 0;
switch (argv[1][0]) {
case 'i': break;
case 's': port_cmd = (PORTFIO_SET - PORTFIO); break;
case 'c': port_cmd = (PORTFIO_CLEAR - PORTFIO); break;
case 't': port_cmd = (PORTFIO_TOGGLE - PORTFIO); break;
default: goto show_usage;
}
/* parse the pin with format: [p]<fgh><#> */
const char *str_pin = argv[2];
/* grab the [p]<fgh> portion */
ulong port_base;
if (*str_pin == 'p') ++str_pin;
switch (*str_pin) {
case 'f': port_base = PORTFIO; break;
case 'g': port_base = PORTGIO; break;
case 'h': port_base = PORTHIO; break;
default: goto show_usage;
}
/* grab the <#> portion */
ulong pin = simple_strtoul(str_pin+1, NULL, 10);
ulong pin_mask = (1 << pin);
if (pin > 15)
goto show_usage;
/* finally, let's do it: set direction and exec command */
switch (*str_pin) {
case 'f': bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~pin_mask); break;
case 'g': bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~pin_mask); break;
case 'h': bfin_write_PORTH_FER(bfin_read_PORTH_FER() & ~pin_mask); break;
}
ulong port_dir = port_base + (PORTFIO_DIR - PORTFIO);
if (argv[1][0] == 'i')
bfin_write16(port_dir, bfin_read16(port_dir) & ~pin_mask);
else {
bfin_write16(port_dir, bfin_read16(port_dir) | pin_mask);
bfin_write16(port_base + port_cmd, pin_mask);
}
printf("gpio: pin %li on port %c has been %c\n", pin, *str_pin, argv[1][0]);
return 0;
}
U_BOOT_CMD(gpio, 3, 0, do_gpio,
"gpio - set/clear/toggle gpio output pins\n",
"<s|c|t> <port><pin>\n"
" - set/clear/toggle the specified pin\n");
/*
* gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
*
* Copyright (c) 2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <asm/blackfin.h>
#include <asm/io.h>
#include "gpio_cfi_flash.h"
#define GPIO_PIN_1 PH9
#define GPIO_MASK_1 (1 << 21)
#define GPIO_PIN_2 PG11
#define GPIO_MASK_2 (1 << 22)
#define GPIO_MASK (GPIO_MASK_1 | GPIO_MASK_2)
void *gpio_cfi_flash_swizzle(void *vaddr)
{
unsigned long addr = (unsigned long)vaddr;
if (addr & GPIO_MASK_1)
bfin_write_PORTHIO_SET(GPIO_PIN_1);
else
bfin_write_PORTHIO_CLEAR(GPIO_PIN_1);
#ifdef GPIO_MASK_2
if (addr & GPIO_MASK_2)
bfin_write_PORTGIO_SET(GPIO_PIN_2);
else
bfin_write_PORTGIO_CLEAR(GPIO_PIN_2);
#endif
SSYNC();
return (void *)(addr & ~GPIO_MASK);
}
#define __raw_writeq(value, addr) *(volatile u64 *)addr = value
#define __raw_readq(addr) *(volatile u64 *)addr
#define MAKE_FLASH(size, sfx) \
void flash_write##size(u##size value, void *addr) \
{ \
__raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \
} \
u##size flash_read##size(void *addr) \
{ \
return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \
}
MAKE_FLASH(8, b) /* flash_write8() flash_read8() */
MAKE_FLASH(16, w) /* flash_write16() flash_write16() */
MAKE_FLASH(32, l) /* flash_write32() flash_write32() */
MAKE_FLASH(64, q) /* flash_write64() flash_write64() */
void gpio_cfi_flash_init(void)
{
bfin_write_PORTHIO_DIR(bfin_read_PORTHIO_DIR() | GPIO_PIN_1);
bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | GPIO_PIN_2);
gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE);
}
/*
* gpio_cfi_flash.c - GPIO-assisted Flash Chip Support
*
* Copyright (c) 2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
void *gpio_cfi_flash_swizzle(void *vaddr);
void gpio_cfi_flash_init(void);
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}
/*
* U-boot - Configuration file for CM-BF527 board
*/
#ifndef __CONFIG_CM_BF527_H__
#define __CONFIG_CM_BF527_H__
#include <asm/blackfin-config-pre.h>
/*
* Processor Settings
*/
#define CONFIG_BFIN_CPU bf527-0.0
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
*/
/* CONFIG_CLKIN_HZ is any value in Hz */
#define CONFIG_CLKIN_HZ 25000000
/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
/* 1 = CLKIN / 2 */
#define CONFIG_CLKIN_HALF 0
/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
/* 1 = bypass PLL */
#define CONFIG_PLL_BYPASS 0
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
/* Values can range from 0-63 (where 0 means 64) */
#define CONFIG_VCO_MULT 21
/* CCLK_DIV controls the core clock divider */
/* Values can be 1, 2, 4, or 8 ONLY */
#define CONFIG_CCLK_DIV 1
/* SCLK_DIV controls the system clock divider */
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 4
/*
* Memory Settings
*/
#define CONFIG_MEM_ADD_WDTH 9
#define CONFIG_MEM_SIZE 32
#define CONFIG_EBIU_SDRRC_VAL 0x3f8
#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
/*
* NAND Settings
* (can't be used sametime as ethernet)
*/
/* #define CONFIG_BFIN_NFC */
#ifdef CONFIG_BFIN_NFC
#define CONFIG_BFIN_NFC_CTL_VAL 0x0033
#define CONFIG_SYS_NAND_BASE 0 /* not actually used */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define NAND_MAX_CHIPS 1
#define CONFIG_CMD_NAND
#endif
/*
* Network Settings
*/
#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
!defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC)
#define ADI_CMDS_NETWORK 1
#define CONFIG_BFIN_MAC
#define CONFIG_RMII
#define CONFIG_NETCONSOLE 1
#define CONFIG_NET_MULTI 1
#endif
#define CONFIG_HOSTNAME cm-bf527
/* Uncomment next line to use fixed MAC address */
/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
/*
* Flash Settings
*/
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
#define CONFIG_SYS_FLASH_BASE 0x20000000
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 64
/*
* Env Storage Settings
*/
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR 0x20008000
#define CONFIG_ENV_OFFSET 0x8000
#define CONFIG_ENV_SIZE 0x8000
#define CONFIG_ENV_SECT_SIZE 0x20000
#define ENV_IS_EMBEDDED_CUSTOM
/*
* I2C Settings
*/
#define CONFIG_BFIN_TWI_I2C 1
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0
/*
* Misc Settings
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0
/*
* Pull in common ADI header for remaining command/environment setup
*/
#include <configs/bfin_adi_common.h>
#include <asm/blackfin-config-post.h>
#endif
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