Commit 5a912043 authored by Albert ARIBAUD's avatar Albert ARIBAUD

Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

parents 572886af 4d6c9671
......@@ -284,6 +284,7 @@ LIBS-y += drivers/pci/libpci.o
LIBS-y += drivers/pcmcia/libpcmcia.o
LIBS-y += drivers/power/libpower.o \
drivers/power/fuel_gauge/libfuel_gauge.o \
drivers/power/mfd/libmfd.o \
drivers/power/pmic/libpmic.o \
drivers/power/battery/libbattery.o
LIBS-y += drivers/spi/libspi.o
......
......@@ -8,6 +8,14 @@
#include <common.h>
#include <i2c.h>
#ifndef CONFIG_SOFT_I2C_I2C10_SCL
#define CONFIG_SOFT_I2C_I2C10_SCL 0
#endif
#ifndef CONFIG_SOFT_I2C_I2C10_SDA
#define CONFIG_SOFT_I2C_I2C10_SDA 0
#endif
/* Handle multiple I2C buses instances */
int get_multi_scl_pin(void)
{
......@@ -18,6 +26,8 @@ int get_multi_scl_pin(void)
return CONFIG_SOFT_I2C_I2C5_SCL;
case I2C_1:
return CONFIG_SOFT_I2C_I2C9_SCL;
case I2C_2:
return CONFIG_SOFT_I2C_I2C10_SCL;
default:
printf("I2C_%d not supported!\n", bus);
};
......@@ -34,6 +44,8 @@ int get_multi_sda_pin(void)
return CONFIG_SOFT_I2C_I2C5_SDA;
case I2C_1:
return CONFIG_SOFT_I2C_I2C9_SDA;
case I2C_2:
return CONFIG_SOFT_I2C_I2C10_SDA;
default:
printf("I2C_%d not supported!\n", bus);
};
......
#
# Copyright (c) 2000 - 2013 Samsung Electronics Co., Ltd. All rights reserved.
# Sanghee Kim <sh0130.kim@samsung.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS-y := trats2.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
clean:
rm -f $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
This diff is collapsed.
......@@ -274,6 +274,7 @@ Active arm armv7 exynos samsung smdk5250
Active arm armv7 exynos samsung smdk5250 snow - Rajeshwari Shinde <rajeshwari.s@samsung.com>
Active arm armv7 exynos samsung smdkv310 smdkv310 - Chander Kashyap <k.chander@samsung.com>
Active arm armv7 exynos samsung trats trats - Lukasz Majewski <l.majewski@samsung.com>
Active arm armv7 exynos samsung trats2 trats2 - Piotr Wilczek <p.wilczek@samsung.com>
Active arm armv7 exynos samsung universal_c210 s5pc210_universal - Minkyu Kang <mk7.kang@samsung.com>
Active arm armv7 highbank - highbank highbank - Rob Herring <rob.herring@calxeda.com>
Active arm armv7 mx5 denx m53evk m53evk m53evk:IMX_CONFIG=board/denx/m53evk/imximage.cfg Marek Vasut <marek.vasut@gmail.com>
......
......@@ -10,6 +10,7 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libbattery.o
COBJS-$(CONFIG_POWER_BATTERY_TRATS) += bat_trats.o
COBJS-$(CONFIG_POWER_BATTERY_TRATS2) += bat_trats2.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
......
/*
* Copyright (C) 2013 Samsung Electronics
* Piotr Wilczek <p.wilczek@samsung.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <power/pmic.h>
#include <power/battery.h>
#include <power/max8997_pmic.h>
#include <errno.h>
static struct battery battery_trats;
static int power_battery_charge(struct pmic *bat)
{
struct power_battery *p_bat = bat->pbat;
if (bat->chrg->chrg_state(p_bat->chrg, CHARGER_ENABLE, 450))
return -1;
return 0;
}
static int power_battery_init_trats2(struct pmic *bat_,
struct pmic *fg_,
struct pmic *chrg_,
struct pmic *muic_)
{
bat_->pbat->fg = fg_;
bat_->pbat->chrg = chrg_;
bat_->pbat->muic = muic_;
bat_->fg = fg_->fg;
bat_->chrg = chrg_->chrg;
bat_->chrg->chrg_type = muic_->chrg->chrg_type;
return 0;
}
static struct power_battery power_bat_trats2 = {
.bat = &battery_trats,
.battery_init = power_battery_init_trats2,
.battery_charge = power_battery_charge,
};
int power_bat_init(unsigned char bus)
{
static const char name[] = "BAT_TRATS2";
struct pmic *p = pmic_alloc();
if (!p) {
printf("%s: POWER allocation error!\n", __func__);
return -ENOMEM;
}
debug("Board BAT init\n");
p->interface = PMIC_NONE;
p->name = name;
p->bus = bus;
p->pbat = &power_bat_trats2;
return 0;
}
#
# Copyright (C) 2013 Samsung Electronics
# Piotr Wilczek <p.wilczek@samsung.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
include $(TOPDIR)/config.mk
LIB := $(obj)libmfd.o
COBJS-$(CONFIG_POWER_PMIC_MAX77693) += pmic_max77693.o
COBJS-$(CONFIG_POWER_MUIC_MAX77693) += muic_max77693.o
COBJS-$(CONFIG_POWER_FG_MAX77693) += fg_max77693.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
all: $(LIB)
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
########################################################################
/*
* Copyright (C) 2013 Samsung Electronics
* Piotr Wilczek <p.wilczek@samsung.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <power/pmic.h>
#include <power/max77693_fg.h>
#include <i2c.h>
#include <power/power_chrg.h>
#include <power/battery.h>
#include <power/fg_battery_cell_params.h>
#include <errno.h>
static int max77693_get_vcell(u32 *vcell)
{
u16 value;
u8 ret;
ret = i2c_read(MAX77693_FUEL_I2C_ADDR, MAX77693_VCELL, 1,
(u8 *)&value, 2);
if (ret)
return ret;
*vcell = (u32)(value >> 3);
*vcell = *vcell * 625;
return 0;
}
static int max77693_get_soc(u32 *soc)
{
u16 value;
u8 ret;
ret = i2c_read(MAX77693_FUEL_I2C_ADDR, MAX77693_VFSOC, 1,
(u8 *)&value, 2);
if (ret)
return ret;
*soc = (u32)(value >> 8);
return 0;
}
static int power_update_battery(struct pmic *p, struct pmic *bat)
{
struct power_battery *pb = bat->pbat;
int ret;
if (pmic_probe(p)) {
puts("Can't find max77693 fuel gauge\n");
return -1;
}
ret = max77693_get_soc(&pb->bat->state_of_chrg);
if (ret)
return ret;
max77693_get_vcell(&pb->bat->voltage_uV);
if (ret)
return ret;
return 0;
}
static int power_check_battery(struct pmic *p, struct pmic *bat)
{
struct power_battery *pb = bat->pbat;
unsigned int val;
int ret = 0;
if (pmic_probe(p)) {
puts("Can't find max77693 fuel gauge\n");
return -1;
}
ret = pmic_reg_read(p, MAX77693_STATUS, &val);
if (ret)
return ret;
debug("fg status: 0x%x\n", val);
ret = pmic_reg_read(p, MAX77693_VERSION, &pb->bat->version);
if (ret)
return ret;
ret = power_update_battery(p, bat);
if (ret)
return ret;
debug("fg ver: 0x%x\n", pb->bat->version);
printf("BAT: state_of_charge(SOC):%d%%\n",
pb->bat->state_of_chrg);
printf(" voltage: %d.%6.6d [V] (expected to be %d [mAh])\n",
pb->bat->voltage_uV / 1000000,
pb->bat->voltage_uV % 1000000,
pb->bat->capacity);
if (pb->bat->voltage_uV > 3850000)
pb->bat->state = EXT_SOURCE;
else if (pb->bat->voltage_uV < 3600000 || pb->bat->state_of_chrg < 5)
pb->bat->state = CHARGE;
else
pb->bat->state = NORMAL;
return 0;
}
static struct power_fg power_fg_ops = {
.fg_battery_check = power_check_battery,
.fg_battery_update = power_update_battery,
};
int power_fg_init(unsigned char bus)
{
static const char name[] = "MAX77693_FG";
struct pmic *p = pmic_alloc();
if (!p) {
printf("%s: POWER allocation error!\n", __func__);
return -ENOMEM;
}
debug("Board Fuel Gauge init\n");
p->name = name;
p->interface = PMIC_I2C;
p->number_of_regs = FG_NUM_OF_REGS;
p->hw.i2c.addr = MAX77693_FUEL_I2C_ADDR;
p->hw.i2c.tx_num = 2;
p->sensor_byte_order = PMIC_SENSOR_BYTE_ORDER_BIG;
p->bus = bus;
p->fg = &power_fg_ops;
return 0;
}
/*
* Copyright (C) 2013 Samsung Electronics
* Piotr Wilczek <p.wilczek@samsung.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <power/pmic.h>
#include <power/power_chrg.h>
#include <power/max77693_muic.h>
#include <i2c.h>
#include <errno.h>
static int power_chrg_get_type(struct pmic *p)
{
unsigned int val;
unsigned int charge_type, charger;
/* if probe failed, return cable none */
if (pmic_probe(p))
return CHARGER_NO;
pmic_reg_read(p, MAX77693_MUIC_STATUS2, &val);
charge_type = val & MAX77693_MUIC_CHG_MASK;
switch (charge_type) {
case MAX77693_MUIC_CHG_NO:
charger = CHARGER_NO;
break;
case MAX77693_MUIC_CHG_USB:
case MAX77693_MUIC_CHG_USB_D:
charger = CHARGER_USB;
break;
case MAX77693_MUIC_CHG_TA:
case MAX77693_MUIC_CHG_TA_1A:
charger = CHARGER_TA;
break;
case MAX77693_MUIC_CHG_TA_500:
charger = CHARGER_TA_500;
break;
default:
charger = CHARGER_UNKNOWN;
break;
}
return charger;
}
static struct power_chrg power_chrg_muic_ops = {
.chrg_type = power_chrg_get_type,
};
int power_muic_init(unsigned int bus)
{
static const char name[] = "MAX77693_MUIC";
struct pmic *p = pmic_alloc();
if (!p) {
printf("%s: POWER allocation error!\n", __func__);
return -ENOMEM;
}
debug("Board Micro USB Interface Controller init\n");
p->name = name;
p->interface = PMIC_I2C;
p->number_of_regs = MUIC_NUM_OF_REGS;
p->hw.i2c.addr = MAX77693_MUIC_I2C_ADDR;
p->hw.i2c.tx_num = 1;
p->bus = bus;
p->chrg = &power_chrg_muic_ops;
return 0;
}
/*
* Copyright (C) 2013 Samsung Electronics
* Piotr Wilczek <p.wilczek@samsung.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <power/pmic.h>
#include <power/max77693_pmic.h>
#include <i2c.h>
#include <errno.h>
static int max77693_charger_state(struct pmic *p, int state, int current)
{
unsigned int val;
if (pmic_probe(p))
return -1;
/* unlock write capability */
val = MAX77693_CHG_UNLOCK;
pmic_reg_write(p, MAX77693_CHG_CNFG_06, val);
if (state == CHARGER_DISABLE) {
puts("Disable the charger.\n");
pmic_reg_read(p, MAX77693_CHG_CNFG_00, &val);
val &= ~0x01;
pmic_reg_write(p, MAX77693_CHG_CNFG_00, val);
return -1;
}
if (current < CHARGER_MIN_CURRENT || current > CHARGER_MAX_CURRENT) {
printf("%s: Wrong charge current: %d [mA]\n",
__func__, current);
return -1;
}
/* set charging current */
pmic_reg_read(p, MAX77693_CHG_CNFG_02, &val);
val &= ~MAX77693_CHG_CC;
val |= current * 10 / 333; /* 0.1A/3 steps */
pmic_reg_write(p, MAX77693_CHG_CNFG_02, val);
/* enable charging */
val = MAX77693_CHG_MODE_ON;
pmic_reg_write(p, MAX77693_CHG_CNFG_00, val);
/* check charging current */
pmic_reg_read(p, MAX77693_CHG_CNFG_02, &val);
val &= 0x3f;
printf("Enable the charger @ %d [mA]\n", val * 333 / 10);
return 0;
}
static int max77693_charger_bat_present(struct pmic *p)
{
unsigned int val;
if (pmic_probe(p))
return -1;
pmic_reg_read(p, MAX77693_CHG_INT_OK, &val);
return !(val & MAX77693_CHG_DETBAT);
}
static struct power_chrg power_chrg_pmic_ops = {
.chrg_bat_present = max77693_charger_bat_present,
.chrg_state = max77693_charger_state,
};
int pmic_init_max77693(unsigned char bus)
{
static const char name[] = "MAX77693_PMIC";
struct pmic *p = pmic_alloc();
if (!p) {
printf("%s: POWER allocation error!\n", __func__);
return -ENOMEM;
}
debug("Board PMIC init\n");
p->name = name;
p->interface = PMIC_I2C;
p->number_of_regs = PMIC_NUM_OF_REGS;
p->hw.i2c.addr = MAX77693_PMIC_I2C_ADDR;
p->hw.i2c.tx_num = 1;
p->bus = bus;
p->chrg = &power_chrg_pmic_ops;
return 0;
}
/*
* Copyright (C) 2013 Samsung Electronics
* Sanghee Kim <sh0130.kim@samsung.com>
* Piotr Wilczek <p.wilczek@samsung.com>
*
* Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P /* which is in a S5P Family */
#define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */
#define CONFIG_TIZEN /* TIZEN lib */
#define PLATFORM_NO_UNALIGNED
#include <asm/arch/cpu.h> /* get chip and board defs */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_CACHELINE_SIZE 32
#ifndef CONFIG_SYS_L2CACHE_OFF
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE 0x10502000
#endif
#define CONFIG_NR_DRAM_BANKS 4
#define PHYS_SDRAM_1 0x40000000 /* LDDDR2 DMC 0 */
#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
#define PHYS_SDRAM_3 0x60000000 /* LPDDR2 DMC 1 */
#define PHYS_SDRAM_3_SIZE (256 << 20) /* 256 MB in CS 0 */
#define PHYS_SDRAM_4 0x70000000 /* LPDDR2 DMC 1 */
#define PHYS_SDRAM_4_SIZE (256 << 20) /* 256 MB in CS 0 */
#define PHYS_SDRAM_END 0x80000000
#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
#define CONFIG_SYS_TEXT_BASE 0x78100000
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
/* MACH_TYPE_TRATS2 */
#define MACH_TYPE_TRATS2 3765
#define CONFIG_MACH_TYPE MACH_TYPE_TRATS2
#define CONFIG_DISPLAY_CPUINFO
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
/* select serial console configuration */
#define CONFIG_SERIAL2
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_CMDLINE_EDITING
#define CONFIG_BAUDRATE 115200
/* It should define before config_cmd_default.h */
#define CONFIG_SYS_NO_FLASH
/***********************************************************
* Command definition
***********************************************************/
#include <config_cmd_default.h>
#undef CONFIG_CMD_ECHO
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_NAND
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_XIMG
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MMC
#define CONFIG_CMD_GPT
#define CONFIG_CMD_PMIC
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
/* EXT4 */
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
/* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */
#undef CONFIG_CMD_NET
/* MMC */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_S5P_SDHCI
#define CONFIG_SDHCI
#define CONFIG_MMC_SDMA
#define CONFIG_MMC_DEFAULT_DEV 0
/* PWM */
#define CONFIG_PWM
#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run mmcboot"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
#define PARTS_BOOTLOADER "u-boot"
#define PARTS_BOOT "boot"
#define PARTS_ROOT "platform"
#define PARTS_DATA "data"
#define PARTS_CSC "csc"
#define PARTS_UMS "ums"
#define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
"name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
"name="PARTS_BOOTLOADER",size=60MiB," \
"uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
"name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
"name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
"name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootk=" \
"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
"updatemmc=" \
"mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \
"mmc boot 0 1 1 0\0" \
"updatebackup=" \
"mmc boot 0 1 1 2; mmc write 0x42100000 0 0x200;" \
" mmc boot 0 1 1 0\0" \
"updatebootb=" \
"mmc read 0x51000000 0x80 0x200; run updatebackup\0" \
"updateuboot=" \
"mmc write 0x50000000 0x80 0x400\0" \
"mmcboot=" \
"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
"boottrace=setenv opts initcall_debug; run bootcmd\0" \
"verify=n\0" \
"rootfstype=ext4\0" \
"console=" CONFIG_DEFAULT_CONSOLE \
"kernelname=uImage\0" \
"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
"0x40007FC0 ${kernelname}\0" \
"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
"${fdtfile}\0" \
"mmcdev=0\0" \
"mmcbootpart=2\0" \
"mmcrootpart=5\0" \
"opts=always_resume=1\0" \
"partitions=" PARTS_DEFAULT \
"uartpath=ap\0" \
"usbpath=ap\0" \
"consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
"consoleoff=set console console=ram; save; reset\0" \
"spladdr=0x40000100\0" \
"splsize=0x200\0" \
"splfile=falcon.bin\0" \
"spl_export=" \
"setexpr spl_imgsize ${splsize} + 8 ;" \
"setenv spl_imgsize 0x${spl_imgsize};" \
"setexpr spl_imgaddr ${spladdr} - 8 ;" \
"setexpr spl_addr_tmp ${spladdr} - 4 ;" \
"mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
"spl export atags 0x40007FC0;" \
"crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
"mw.l ${spl_addr_tmp} ${splsize};" \
"ext4write mmc ${mmcdev}:${mmcbootpart}" \
" /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
"setenv spl_imgsize;" \
"setenv spl_imgaddr;" \
"setenv spl_addr_tmp;\0" \
"fdtaddr=40800000\0" \
"fdtfile=exynos4412-trats2.dtb\0"
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_HZ 1000
/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_MONITOR_BASE 0x00000000