iomux-v3.h : some pins have 7 mux modes

parent f5737613
......@@ -102,6 +102,10 @@ typedef u64 iomux_v3_cfg_t;
#define PAD_CTL_FSEL1 (0x1 << 3)
#define PAD_CTL_FSEL2 (0x2 << 3)
#define PAD_CTL_FSEL3 (0x3 << 3)
#define PAD_CTL_FSEL4 (0x4 << 3)
#define PAD_CTL_FSEL5 (0x5 << 3)
#define PAD_CTL_FSEL6 (0x6 << 3)
#define PAD_CTL_FSEL7 (0x7 << 3)
#define PAD_CTL_ODE (0x1 << 5)
#define PAD_CTL_PUE (0x1 << 6)
......
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