Commit 7b3a032d authored by Masahiro Yamada's avatar Masahiro Yamada

ARM: uniphier: avoid unaligned access to DT on 64bit SoC

Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 74031432
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
#include <common.h> #include <common.h>
#include <libfdt.h> #include <libfdt.h>
#include <fdtdec.h>
#include <linux/err.h> #include <linux/err.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
...@@ -40,8 +41,7 @@ int dram_init(void) ...@@ -40,8 +41,7 @@ int dram_init(void)
val += ac; val += ac;
gd->ram_size = sc == 2 ? fdt64_to_cpu(*(fdt64_t *)val) : gd->ram_size = fdtdec_get_number(val, sc);
fdt32_to_cpu(*val);
debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size); debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
...@@ -71,11 +71,9 @@ void dram_init_banksize(void) ...@@ -71,11 +71,9 @@ void dram_init_banksize(void)
for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells; for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
i++, len -= cells) { i++, len -= cells) {
gd->bd->bi_dram[i].start = ac == 2 ? gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val);
val += ac; val += ac;
gd->bd->bi_dram[i].size = sc == 2 ? gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
fdt64_to_cpu(*(fdt64_t *)val) : fdt32_to_cpu(*val);
val += sc; val += sc;
debug("DRAM bank %d: start = %08lx, size = %08lx\n", debug("DRAM bank %d: start = %08lx, size = %08lx\n",
......
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