Commit 7b3bd9a7 authored by J. German Rivera's avatar J. German Rivera Committed by York Sun

drivers/mc: Migrated MC Flibs to 0.5.2

Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory
fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree
from "fsl,dprcr" to "fsl-mc". Print MC version info when
appropriate.
Signed-off-by: default avatarJ. German Rivera <German.Rivera@freescale.com>
Signed-off-by: default avatarLijun Pan <Lijun.Pan@freescale.com>
Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
parent 4f2532c4
......@@ -10,10 +10,10 @@
#include <asm/armv8/mmu.h>
#include <asm/io.h>
#include <asm/arch-fsl-lsch3/immap_lsch3.h>
#include <fsl-mc/fsl_mc.h>
#include "cpu.h"
#include "mp.h"
#include "speed.h"
#include <fsl_mc.h>
DECLARE_GLOBAL_DATA_PTR;
......
......@@ -12,7 +12,7 @@
#include <asm/io.h>
#include <fdt_support.h>
#include <libfdt.h>
#include <fsl_mc.h>
#include <fsl-mc/fsl_mc.h>
#include <environment.h>
DECLARE_GLOBAL_DATA_PTR;
......@@ -98,7 +98,21 @@ void fdt_fixup_board_enet(void *fdt)
{
int offset;
offset = fdt_path_offset(fdt, "/fsl,dprc@0");
offset = fdt_path_offset(fdt, "/fsl-mc");
/*
* TODO: Remove this when backward compatibility
* with old DT node (fsl,dprc@0) is no longer needed.
*/
if (offset < 0)
offset = fdt_path_offset(fdt, "/fsl,dprc@0");
if (offset < 0) {
printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n",
__func__, offset);
return;
}
if (get_mc_boot_status() == 0)
fdt_status_okay(fdt, offset);
else
......
......@@ -65,5 +65,5 @@ obj-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o xilinx_ll_temac_mdio.o \
xilinx_ll_temac_fifo.o xilinx_ll_temac_sdma.o
obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
obj-$(CONFIG_FSL_MC_ENET) += fsl_mc/
obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
obj-$(CONFIG_VSC9953) += vsc9953.o
......@@ -5,4 +5,6 @@
#
# Layerscape MC driver
obj-y += mc.o
obj-y += mc.o \
mc_sys.o \
dpmng.o
/* Copyright 2014 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <fsl-mc/fsl_mc_sys.h>
#include <fsl-mc/fsl_mc_cmd.h>
#include <fsl-mc/fsl_dpmng.h>
#include "fsl_dpmng_cmd.h"
int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info)
{
struct mc_command cmd = { 0 };
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_VERSION,
MC_CMD_PRI_LOW, 0);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
DPMNG_RSP_GET_VERSION(cmd, mc_ver_info);
return 0;
}
int dpmng_reset_aiop(struct fsl_mc_io *mc_io, int container_id,
int aiop_tile_id)
{
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPMNG_CMDID_RESET_AIOP,
MC_CMD_PRI_LOW, 0);
DPMNG_CMD_RESET_AIOP(cmd, container_id, aiop_tile_id);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
int dpmng_load_aiop(struct fsl_mc_io *mc_io,
int container_id,
int aiop_tile_id,
uint64_t img_iova,
uint32_t img_size)
{
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPMNG_CMDID_LOAD_AIOP,
MC_CMD_PRI_LOW,
0);
DPMNG_CMD_LOAD_AIOP(cmd, container_id, aiop_tile_id, img_size,
img_iova);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
int dpmng_run_aiop(struct fsl_mc_io *mc_io,
int container_id,
int aiop_tile_id,
const struct dpmng_aiop_run_cfg *cfg)
{
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPMNG_CMDID_RUN_AIOP,
MC_CMD_PRI_LOW,
0);
DPMNG_CMD_RUN_AIOP(cmd, container_id, aiop_tile_id, cfg);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
int dpmng_reset_mc_portal(struct fsl_mc_io *mc_io)
{
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPMNG_CMDID_RESET_MC_PORTAL,
MC_CMD_PRI_LOW,
0);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
/* Copyright 2014 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __FSL_DPMNG_CMD_H
#define __FSL_DPMNG_CMD_H
/* Command IDs */
#define DPMNG_CMDID_GET_VERSION 0x831
#define DPMNG_CMDID_RESET_AIOP 0x832
#define DPMNG_CMDID_LOAD_AIOP 0x833
#define DPMNG_CMDID_RUN_AIOP 0x834
#define DPMNG_CMDID_RESET_MC_PORTAL 0x835
/* cmd, param, offset, width, type, arg_name */
#define DPMNG_RSP_GET_VERSION(cmd, mc_ver_info) \
do { \
MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mc_ver_info->revision); \
MC_RSP_OP(cmd, 0, 32, 32, uint32_t, mc_ver_info->major); \
MC_RSP_OP(cmd, 1, 0, 32, uint32_t, mc_ver_info->minor); \
} while (0)
/* cmd, param, offset, width, type, arg_name */
#define DPMNG_CMD_RESET_AIOP(cmd, container_id, aiop_tile_id) \
do { \
MC_CMD_OP(cmd, 0, 0, 32, int, aiop_tile_id); \
MC_CMD_OP(cmd, 0, 32, 32, int, container_id); \
} while (0)
/* cmd, param, offset, width, type, arg_name */
#define DPMNG_CMD_LOAD_AIOP(cmd, container_id, aiop_tile_id, img_size, \
img_iova) \
do { \
MC_CMD_OP(cmd, 0, 0, 32, int, aiop_tile_id); \
MC_CMD_OP(cmd, 0, 32, 32, int, container_id); \
MC_CMD_OP(cmd, 1, 0, 32, uint32_t, img_size); \
MC_CMD_OP(cmd, 2, 0, 64, uint64_t, img_iova); \
} while (0)
/* cmd, param, offset, width, type, arg_name */
#define DPMNG_CMD_RUN_AIOP(cmd, container_id, aiop_tile_id, cfg) \
do { \
MC_CMD_OP(cmd, 0, 0, 32, int, aiop_tile_id); \
MC_CMD_OP(cmd, 0, 32, 32, int, container_id); \
MC_CMD_OP(cmd, 1, 0, 32, uint32_t, cfg->cores_mask); \
MC_CMD_OP(cmd, 2, 0, 64, uint64_t, cfg->options); \
} while (0)
#endif /* __FSL_DPMNG_CMD_H */
......@@ -3,9 +3,12 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <errno.h>
#include <asm/io.h>
#include <fsl_mc.h>
#include <fsl-mc/fsl_mc.h>
#include <fsl-mc/fsl_mc_sys.h>
#include <fsl-mc/fsl_dpmng.h>
DECLARE_GLOBAL_DATA_PTR;
static int mc_boot_status;
......@@ -14,7 +17,7 @@ static int mc_boot_status;
* Copying MC firmware or DPL image to DDR
*/
static int mc_copy_image(const char *title,
u64 image_addr, u32 image_size, u64 mc_ram_addr)
u64 image_addr, u32 image_size, u64 mc_ram_addr)
{
debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
......@@ -25,10 +28,9 @@ static int mc_copy_image(const char *title,
* MC firmware FIT image parser checks if the image is in FIT
* format, verifies integrity of the image and calculates
* raw image address and size values.
* Returns 0 if success and 1 if any of the above mentioned
* Returns 0 on success and a negative errno on error.
* task fail.
**/
int parse_mc_firmware_fit_image(const void **raw_image_addr,
size_t *raw_image_size)
{
......@@ -39,7 +41,7 @@ int parse_mc_firmware_fit_image(const void **raw_image_addr,
size_t size;
const char *uname = "firmware";
/* Check if the image is in NOR flash*/
/* Check if the image is in NOR flash */
#ifdef CONFIG_SYS_LS_MC_FW_IN_NOR
fit_hdr = (void *)CONFIG_SYS_LS_MC_FW_ADDR;
#else
......@@ -50,26 +52,26 @@ int parse_mc_firmware_fit_image(const void **raw_image_addr,
format = genimg_get_format(fit_hdr);
if (format != IMAGE_FORMAT_FIT) {
debug("Not a FIT image\n");
return 1;
printf("fsl-mc: ERROR: Bad firmware image (not a FIT image)\n");
return -EINVAL;
}
if (!fit_check_format(fit_hdr)) {
debug("Bad FIT image format\n");
return 1;
printf("fsl-mc: ERROR: Bad firmware image (bad FIT header)\n");
return -EINVAL;
}
node_offset = fit_image_get_node(fit_hdr, uname);
if (node_offset < 0) {
debug("Can not find %s subimage\n", uname);
return 1;
printf("fsl-mc: ERROR: Bad firmware image (missing subimage)\n");
return -ENOENT;
}
/* Verify MC firmware image */
if (!(fit_image_verify(fit_hdr, node_offset))) {
debug("Bad MC firmware hash");
return 1;
printf("fsl-mc: ERROR: Bad firmware image (bad CRC)\n");
return -EINVAL;
}
/* Get address and size of raw image */
......@@ -90,12 +92,13 @@ int mc_init(bd_t *bis)
u64 mc_dpl_offset;
u32 reg_gsr;
u32 mc_fw_boot_status;
void *fdt_hdr;
void *dpl_fdt_hdr;
int dpl_size;
const void *raw_image_addr;
size_t raw_image_size = 0;
BUILD_BUG_ON(CONFIG_SYS_LS_MC_FW_LENGTH % 4 != 0);
struct fsl_mc_io mc_io;
int portal_id;
struct mc_version mc_ver_info;
/*
* The MC private DRAM block was already carved at the end of DRAM
......@@ -130,25 +133,44 @@ int mc_init(bd_t *bis)
/*
* Load the MC FW at the beginning of the MC private DRAM block:
*/
mc_copy_image(
"MC Firmware",
(u64)raw_image_addr,
raw_image_size,
mc_ram_addr);
mc_copy_image("MC Firmware",
(u64)raw_image_addr, raw_image_size, mc_ram_addr);
/*
* Get address and size of the DPL blob stored in flash:
*/
#ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR
dpl_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR;
#else
#error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined"
#endif
error = fdt_check_header(dpl_fdt_hdr);
if (error != 0) {
printf("fsl-mc: ERROR: Bad DPL image (bad header)\n");
goto out;
}
dpl_size = fdt_totalsize(dpl_fdt_hdr);
if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
printf("fsl-mc: ERROR: Bad DPL image (too large: %d)\n",
dpl_size);
error = -EINVAL;
goto out;
}
/*
* Calculate offset in the MC private DRAM block at which the MC DPL
* blob is to be placed:
*/
#ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
BUILD_BUG_ON(
(CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
#else
mc_dpl_offset = mc_get_dram_block_size() -
roundup(CONFIG_SYS_LS_MC_DPL_LENGTH, 4096);
roundup(CONFIG_SYS_LS_MC_DPL_MAX_LENGTH, 4096);
if ((mc_dpl_offset & 0x3) != 0 || mc_dpl_offset > 0xffffffff) {
printf("%s: Invalid MC DPL offset: %llu\n",
......@@ -158,23 +180,14 @@ int mc_init(bd_t *bis)
}
#endif
/* Check if DPL image is in NOR flash */
#ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR
fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR;
#else
#error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined"
#endif
dpl_size = fdt_totalsize(fdt_hdr);
/*
* Load the MC DPL blob at the far end of the MC private DRAM block:
*
* TODO: Should we place the DPL at a different location to match
* assumptions of MC firmware about its memory layout?
*/
mc_copy_image(
"MC DPL blob",
(u64)fdt_hdr,
dpl_size,
mc_ram_addr + mc_dpl_offset);
mc_copy_image("MC DPL blob",
(u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
......@@ -200,6 +213,8 @@ int mc_init(bd_t *bis)
*/
out_le32(&mc_ccsr_regs->reg_gsr, (u32)(mc_dpl_offset >> 2));
printf("\nfsl-mc: Booting Management Complex ...\n");
/*
* Deassert reset and release MC core 0 to run
*/
......@@ -219,17 +234,13 @@ int mc_init(bd_t *bis)
}
if (timeout <= 0) {
printf("%s: timeout booting management complex firmware\n",
__func__);
printf("fsl-mc: timeout booting management complex firmware\n");
/* TODO: Get an error status from an MC CCSR register */
error = -ETIMEDOUT;
goto out;
}
printf("Management complex booted (boot status: %#x)\n",
mc_fw_boot_status);
if (mc_fw_boot_status != 0x1) {
/*
* TODO: Identify critical errors from the GSR register's FS
......@@ -237,8 +248,41 @@ int mc_init(bd_t *bis)
* appropriate errno, so that the status property is set to
* failure in the fsl,dprc device tree node.
*/
printf("fsl-mc: WARNING: Firmware booted with error (GSR: %#x)\n",
reg_gsr);
}
/*
* TODO: need to obtain the portal_id for the root container from the
* DPL
*/
portal_id = 0;
/*
* Check that the MC firmware is responding portal commands:
*/
mc_io.mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
portal_id, mc_io.mmio_regs);
error = mc_get_version(&mc_io, &mc_ver_info);
if (error != 0) {
printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
error);
goto out;
}
if (MC_VER_MAJOR != mc_ver_info.major)
printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n",
mc_ver_info.major, MC_VER_MAJOR);
if (MC_VER_MINOR != mc_ver_info.minor)
printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n",
mc_ver_info.minor, MC_VER_MINOR);
printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
mc_fw_boot_status);
out:
if (error != 0)
mc_boot_status = -error;
......
/*
* Freescale Layerscape MC I/O wrapper
*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
* Author: German Rivera <German.Rivera@freescale.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <fsl-mc/fsl_mc_sys.h>
#include <fsl-mc/fsl_mc_cmd.h>
#include <common.h>
#include <errno.h>
#include <asm/io.h>
#define MC_CMD_HDR_READ_CMDID(_hdr) \
((uint16_t)u64_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S))
/**
* mc_send_command - Send MC command and wait for response
*
* @mc_io: Pointer to MC I/O object to be used
* @cmd: MC command buffer. On input, it contains the command to send to the MC.
* On output, it contains the response from the MC if any.
*
* Depending on the sharing option specified when creating the MC portal
* wrapper, this function will use a spinlock or mutex to ensure exclusive
* access to the MC portal from the point when the command is sent until a
* response is received from the MC.
*/
int mc_send_command(struct fsl_mc_io *mc_io,
struct mc_command *cmd)
{
enum mc_cmd_status status;
int timeout = 2000;
mc_write_command(mc_io->mmio_regs, cmd);
for ( ; ; ) {
status = mc_read_response(mc_io->mmio_regs, cmd);
if (status != MC_CMD_STATUS_READY)
break;
if (--timeout == 0) {
printf("Error: Timeout waiting for MC response\n");
return -ETIMEDOUT;
}
udelay(500);
}
if (status != MC_CMD_STATUS_OK) {
printf("Error: MC command failed (portal: %p, obj handle: %#x, command: %#x, status: %#x)\n",
mc_io->mmio_regs,
(unsigned int)MC_CMD_HDR_READ_AUTHID(cmd->header),
(unsigned int)MC_CMD_HDR_READ_CMDID(cmd->header),
(unsigned int)status);
return -EIO;
}
return 0;
}
......@@ -207,12 +207,10 @@
#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024)
#define CONFIG_SYS_LS_MC_FW_IN_NOR
#define CONFIG_SYS_LS_MC_FW_ADDR 0x580200000ULL
/* TODO Actual FW length needs to be determined at runtime from FW header */
#define CONFIG_SYS_LS_MC_FW_LENGTH (4U * 1024 * 1024)
#define CONFIG_SYS_LS_MC_DPL_IN_NOR
#define CONFIG_SYS_LS_MC_DPL_ADDR 0x5806C0000ULL
/* TODO Actual DPL max length needs to be confirmed with the MC FW team */
#define CONFIG_SYS_LS_MC_DPL_LENGTH 4096
#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH (256 * 1024)
#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0xe00000
/* Carve the MC private DRAM block from the end of DRAM */
......
/* Copyright 2014 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*!
* @file fsl_dpmng.h
* @brief Management Complex General API
*/
#ifndef __FSL_DPMNG_H
#define __FSL_DPMNG_H
/*!
* @Group grp_dpmng Management Complex General API
*
* @brief Contains general API for the Management Complex firmware
* @{
*/
struct fsl_mc_io;
/**
* @brief Management Complex firmware version information
*/
#define MC_VER_MAJOR 4
#define MC_VER_MINOR 0
struct mc_version {
uint32_t major;
/*!< Major version number: incremented on API compatibility changes */
uint32_t minor;
/*!< Minor version number: incremented on API additions (that are
* backward compatible); reset when major version is incremented
*/
uint32_t revision;
/*!< Internal revision number: incremented on implementation changes
* and/or bug fixes that have no impact on API
*/
};
/**
* @brief Retrieves the Management Complex firmware version information
*
* @param[in] mc_io Pointer to opaque I/O object
* @param[out] mc_ver_info Pointer to version information structure
*
* @returns '0' on Success; Error code otherwise.
*/
int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info);
/**
* @brief Resets an AIOP tile
*
* @param[in] mc_io Pointer to opaque I/O object
* @param[in] container_id AIOP container ID
* @param[in] aiop_tile_id AIOP tile ID to reset
*
* @returns '0' on Success; Error code otherwise.
*/
int dpmng_reset_aiop(struct fsl_mc_io *mc_io,
int container_id,
int aiop_tile_id);
/**
* @brief Loads an image to AIOP tile
*
* @param[in] mc_io Pointer to opaque I/O object
* @param[in] container_id AIOP container ID
* @param[in] aiop_tile_id AIOP tile ID to reset
* @param[in] img_iova I/O virtual address of AIOP ELF image
* @param[in] img_size Size of AIOP ELF image in memory (in bytes)
*
* @returns '0' on Success; Error code otherwise.
*/
int dpmng_load_aiop(struct fsl_mc_io *mc_io,
int container_id,
int aiop_tile_id,
uint64_t img_iova,
uint32_t img_size);
/**
* @brief AIOP run configuration
*/
struct dpmng_aiop_run_cfg {
uint32_t cores_mask;
/*!< Mask of AIOP cores to run (core 0 in most significant bit) */
uint64_t options;
/*!< Execution options (currently none defined) */
};
/**
* @brief Starts AIOP tile execution
*
* @param[in] mc_io Pointer to MC portal's I/O object
* @param[in] container_id AIOP container ID
* @param[in] aiop_tile_id AIOP tile ID to reset
* @param[in] cfg AIOP run configuration
*
* @returns '0' on Success; Error code otherwise.
*/
int dpmng_run_aiop(struct fsl_mc_io *mc_io,
int container_id,
int aiop_tile_id,
const struct dpmng_aiop_run_cfg *cfg);
/**
* @brief Resets MC portal
*
* This function closes all object handles (tokens) that are currently
* open in the MC portal on which the command is submitted. This allows
* cleanup of stale handles that belong to non-functional user processes.
*
* @param[in] mc_io Pointer to MC portal's I/O object
*
* @returns '0' on Success; Error code otherwise.
*/
int dpmng_reset_mc_portal(struct fsl_mc_io *mc_io);
/** @} */
#endif /* __FSL_DPMNG_H */
/* Copyright 2014 Freescale Semiconductor Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __FSL_MC_CMD_H
#define __FSL_MC_CMD_H
#define MC_CMD_NUM_OF_PARAMS 7
#define MAKE_UMASK64(_width) \
((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1))
static inline uint64_t u64_enc(int lsoffset, int width, uint64_t val)
{
return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
}
static inline uint64_t u64_dec(uint64_t val, int lsoffset, int width)
{
return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
}
struct mc_command {
uint64_t header;
uint64_t params[MC_CMD_NUM_OF_PARAMS];
};
enum mc_cmd_status {
MC_CMD_STATUS_OK = 0x0, /*!< Completed successfully */
MC_CMD_STATUS_READY = 0x1, /*!< Ready to be processed */
MC_CMD_STATUS_AUTH_ERR = 0x3, /*!< Authentication error */
MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /*!< No privilege */
MC_CMD_STATUS_DMA_ERR = 0x5, /*!< DMA or I/O error */
MC_CMD_STATUS_CONFIG_ERR = 0x6, /*!< Configuration error */
MC_CMD_STATUS_TIMEOUT = 0x7, /*!< Operation timed out */
MC_CMD_STATUS_NO_RESOURCE = 0x8, /*!< No resources */
MC_CMD_STATUS_NO_MEMORY = 0x9, /*!< No memory available */
MC_CMD_STATUS_BUSY = 0xA, /*!< Device is busy */
MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /*!< Unsupported operation */
MC_CMD_STATUS_INVALID_STATE = 0xC /*!< Invalid state */
};
#define MC_CMD_HDR_CMDID_O 52 /* Command ID field offset */
#define MC_CMD_HDR_CMDID_S 12 /* Command ID field size */
#define MC_CMD_HDR_AUTHID_O 38 /* Authentication ID field offset */
#define MC_CMD_HDR_AUTHID_S 10 /* Authentication ID field size */
#define MC_CMD_HDR_STATUS_O 16 /* Status field offset */
#define MC_CMD_HDR_STATUS_S 8 /* Status field size*/
#define MC_CMD_HDR_PRI_O 15 /* Priority field offset */
#define MC_CMD_HDR_PRI_S 1 /* Priority field size */
#define MC_CMD_HDR_READ_STATUS(_hdr) \
((enum mc_cmd_status)u64_dec((_hdr), \
MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S))
#define MC_CMD_HDR_READ_AUTHID(_hdr) \
((uint16_t)u64_dec((_hdr), MC_CMD_HDR_AUTHID_O, MC_CMD_HDR_AUTHID_S))
#define MC_CMD_PRI_LOW 0 /*!< Low Priority command indication */
#define MC_CMD_PRI_HIGH 1 /*!< High Priority command indication */
#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
((_cmd).params[_param] |= u64_enc((_offset), (_width), _arg))
#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
(_arg = (_type)u64_dec(_cmd.params[_param], (_offset), (_width)))
static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
uint8_t priority,
uint16_t auth_id)
{
uint64_t hdr;
hdr = u64_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id);
hdr |= u64_enc(MC_CMD_HDR_AUTHID_O, MC_CMD_HDR_AUTHID_S, auth_id);
hdr |= u64_enc(MC_CMD_HDR_PRI_O, MC_CMD_HDR_PRI_S, priority);
hdr |= u64_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S,
MC_CMD_STATUS_READY);
return hdr;
}
/**
* mc_write_command - writes a command to a Management Complex (MC) portal
*
* @portal: pointer to an MC portal
* @cmd: pointer to a filled command
*/
static inline void mc_write_command(struct mc_command __iomem *portal,
struct mc_command *cmd)
{
int i;
/* copy command parameters into the portal */
for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
writeq(cmd->params[i], &portal->params[i]);
/* submit the command by writing the header */
writeq(cmd->header, &portal->header);
}
/**
* mc_read_response - reads the response for the last MC command from a
* Management Complex (MC) portal
*
* @portal: pointer to an MC portal