Commit 7ebf7443 authored by wdenk's avatar wdenk

Initial revision

parent cc1c8a13
#!/bin/sh
if [ "${CROSS_COMPILE}" ] ; then
MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
else
MAKE=make
fi
[ -d LOG ] || mkdir LOG || exit 1
LIST=""
#########################################################################
## MPC8xx Systems
#########################################################################
LIST_8xx=" \
ADS860 AMX860 c2mon CCM \
cogent_mpc8xx ESTEEM192E ETX094 FADS823 \
FADS850SAR FADS860T FLAGADM FPS850L \
GEN860T GENIETV GTH hermes \
IAD210 ICU862_100MHz IP860 IVML24 \
IVML24_128 IVML24_256 IVMS8 IVMS8_128 \
IVMS8_256 LANTEC lwmon MBX \
MBX860T MHPC MVS1 NETVIA \
NX823 pcu_e R360MPI RPXClassic \
RPXlite RRvision SM850 SPD823TS \
SXNI855T TQM823L TQM823L_LCD TQM850L \
TQM855L TQM860L TQM860L_FEC TTTech \
"
#########################################################################
## PPC4xx Systems
#########################################################################
LIST_4xx=" \
ADCIOP AR405 CANBT CPCI405 \
CPCI4052 CPCI440 CPCIISER4 CRAYL1 \
DASA_SIM DU405 EBONY ERIC \
MIP405 ML2 OCRTC ORSG \
PCI405 PIP405 W7OLMC W7OLMG \
WALNUT405 \
"
#########################################################################
## MPC824x Systems
#########################################################################
LIST_824x=" \
BMW CU824 MOUSSE MUSENKI \
OXC PN62 Sandpoint8240 Sandpoint8245 \
utx8245 \
"
#########################################################################
## MPC8260 Systems
#########################################################################
LIST_8260=" \
cogent_mpc8260 CPU86 ep8260 gw8260 \
hymod IPHASE4539 MPC8260ADS PM826 \
ppmc8260 RPXsuper rsdproto sacsng \
sbc8260 SCM TQM8260 \
"
#########################################################################
## 74xx/7xx Systems
#########################################################################
LIST_74xx=" \
EVB64260 PCIPPC2 PCIPPC6 ZUMA \
"
LIST_7xx=" \
BAB7xx ELPPC \
"
LIST_ppc="${LIST_8xx} ${LIST_824x} ${LIST_8260} \
${LIST_4xx} ${LIST_74xx} ${LIST_7xx}"
#########################################################################
## StrongARM Systems
#########################################################################
LIST_SA="lart shannon dnp1110"
#########################################################################
## ARM7 Systems
#########################################################################
LIST_ARM7="impa7 ep7312"
#########################################################################
## ARM9 Systems
#########################################################################
LIST_ARM9="smdk2400 smdk2410 trab"
#########################################################################
## Xscale Systems
#########################################################################
LIST_xscale="lubbock cradle csb226"
LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
#----- for now, just run PPC by default -----
[ $# = 0 ] && set $LIST_ppc
#-----------------------------------------------------------------------
build_target() {
target=$1
${MAKE} distclean >/dev/null
${MAKE} ${target}_config
${MAKE} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
${CROSS_COMPILE:-ppc_8xx-}size u-boot | tee -a LOG/$target.MAKELOG
}
#-----------------------------------------------------------------------
for arg in $@
do
case "$arg" in
8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}
done
;;
*) build_target ${arg}
;;
esac
done
This diff is collapsed.
Cogent Modular Architecture configuration
-----------------------------------------
As the name suggests, the Cogent platform is a modular system where
you have a motherboard into which plugs a cpu module and one or more
i/o modules. This provides very nice flexibility, but makes the
configuration task somewhat harder.
The possible Cogent motherboards are:
Code Config Variable Description
---- --------------- -----------
CMA101 CONFIG_CMA101 32MB ram, 2 ser, 1 par, rtc, dipsw,
2x16 lcd, eth(?)
CMA102 CONFIG_CMA102 32MB ram, 2 ser, 1 par, rtc, dipsw,
2x16 lcd
CMA111 CONFIG_CMA111 32MB ram, 1MB flash, 4 ser, 1 par,
rtc, ps/2 kbd/mse, 2x16 lcd, 2xPCI,
10/100TP eth
CMA120 CONFIG_CMA120 32MB ram, 1MB flash, 4 ser, 1 par,
rtc, ps/2 kbd/mse, 2x16 lcd, 2xPCI,
10/100TP eth, 2xPCMCIA, video/lcd-panel
CMA150 CONFIG_CMA150 8MB ram, 1MB flash, 2 ser, 1 par, rtc,
ps/2 kbd/mse, 2x16 lcd
The possible Cogent PowerPC CPU modules are:
Code Config Variable Description
---- --------------- -----------
CMA278-603EV CONFIG_CMA278_603EV PPC603ev CPU, 66MHz clock, 512K EPROM,
JTAG/COP
CMA278-603ER CONFIG_CMA278_603ER PPC603er CPU, 66MHz clock, 512K EPROM,
JTAG/COP
CMA278-740 CONFIG_CMA278_740 PPC740 CPU, 66MHz clock, 512K EPROM,
JTAG/COP
CMA280-509 CONFIG_CMA280_509 MPC505/509 CPU, 50MHz clock,
512K EPROM, BDM
CMA282 CONFIG_CMA282 MPC8260 CPU, 66MHz clock, 512K EPROM,
JTAG, 16M RAM, 1 x ser (SMC2),
1 x 10baseT PHY (SCC4), 1 x 10/100 TP
PHY (FCC1), 2 x 48pin DIN (FCC2 + TDM1)
CMA285 CONFIG_CMA285 MPC801 CPU, 33MHz clock, 512K EPROM,
BDM
CMA286-21 CONFIG_CMA286_21 MPC821 CPU, 66MHz clock, 512K EPROM,
BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
1 x 10baseT PHY (SCC2)
CMA286-60-OLD CONFIG_CMA286_60_OLD MPC860 CPU, 33MHz clock, 128K EPROM,
BDM
CMA286-60 CONFIG_CMA286_60 MPC860 CPU, 66MHz clock, 512K EPROM,
BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
1 x 10baseT PHY (SCC2)
CMA286-60P CONFIG_CMA286_60P MPC860P CPU, 66MHz clock, 512K EPROM,
BDM, 16M RAM, 2 x ser (SMC1 + SMC2),
1 x 10baseT PHY (SCC2)
CMA287-23 CONFIG_CMA287_23 MPC823 CPU, 33MHz clock, 512K EPROM,
BDM
CMA287-50 CONFIG_CMA287_50 MPC850 CPU, 33MHz clock, 512K EPROM,
BDM
(there are a lot of other cpu modules with ARM, MIPS and M-CORE CPUs,
but we'll worry about those later).
The possible Cogent CMA I/O Modules are:
Code Config Variable Description
---- --------------- -----------
CMA302 CONFIG_CMA302 up to 16M flash, ps/2 keyboard/mouse
CMA352 CONFIG_CMA352 CMAbus <=> PCI
Currently supported:
Motherboards: CMA102
CPU Modules: CMA286-60-OLD
I/O Modules: CMA302 I/O module
To configure, perform the usual U-Boot configuration task of editing
"include/config_cogent_mpc8xx.h" and reviewing all the options and
settings in there. In particular, check the chip select values
installed into the memory controller's various option and base
registers - these are set by the defines CFG_CMA_CSn_{BASE,SIZE} and
CFG_{B,O}Rn_PRELIM. Also be careful of the clock settings installed
into the SCCR - via the define CFG_SCCR. Finally, decide whether you
want the serial console on motherboard serial port A or on one of the
8xx SMC ports, and set CONFIG_8xx_CONS_{SMC1,SMC2,NONE} accordingly
(NONE means use Cogent motherboard serial port A).
Then edit the file "cogent/config.mk". Firstly, set TEXT_BASE to be
the base address of the EPROM for the CPU module. This should be the
same as the value selected for CFG_MONITOR_BASE in
"include/config_cogent_*.h" (in fact, I have made this automatic via
the -DTEXT_BASE=... option in CPPFLAGS).
Finally, set the values of the make variables $(CMA_MB) and $(CMA_IOMS).
$(CMA_MB) is the name of the directory that contains support for your
motherboard. At this stage, only "cma10x" exists, which supports the
CMA101 and CMA102 motherboards - but only selected devices, namely
serial, lcd and dipsw.
$(CMA_IOMS) is a list of zero or more directories that contain
support for the i/o modules you have installed. At this stage, only
"cma302" exists, which supports the CMA302 flash i/o module - but
only the flash part, not the ps/2 keyboard and mouse interfaces.
There should be a make variable for each of the above directories,
which is the directory name with "_O" appended. This make variable is
a list of object files to compile from that directory and include in
the library.
e.g. cma10x_O = serial.o ...
That's it. Good Luck.
Murray.Jensen@cmst.csiro.au
August 31, 2000.
#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# CPU86 boards
#
# This should be equal to the CFG_FLASH_BASE define in config_CPU86.h
# for the "final" configuration, with U-Boot in flash, or the address
# in RAM where U-Boot is loaded at for debugging.
#
ifeq ($(CONFIG_BOOT_ROM),y)
TEXT_BASE := 0xFF800000
PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
else
TEXT_BASE := 0xFF000000
endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# Note: I make an "image" from U-Boot itself, which prefixes 0x40 bytes of
# header info, hence start address is thus shifted.
TEXT_BASE = 0xFFFD0040
This diff is collapsed.
/*
* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Andreas Heppel <aheppel@sysgo.de>
* (C) Copyright 2001 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <mpc106.h>
#include <mk48t59.h>
#include <74xx_7xx.h>
#include <ns87308.h>
#include <video_fb.h>
/*---------------------------------------------------------------------------*/
/*
* Get Bus clock frequency
*/
ulong bab7xx_get_bus_freq (void)
{
/*
* The GPIO Port 1 on BAB7xx reflects the bus speed.
*/
volatile struct GPIO *gpio = (struct GPIO *)(CFG_ISA_IO + CFG_NS87308_GPIO_BASE);
unsigned char data = gpio->dta1;
if (data & 0x02)
return 66666666;
return 83333333;
}
/*---------------------------------------------------------------------------*/
/*
* Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
*/
ulong bab7xx_get_gclk_freq (void)
{
static const int pllratio_to_factor[] = {
00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00,
};
return pllratio_to_factor[get_hid1 () >> 28] * (bab7xx_get_bus_freq() / 10);
}
/*----------------------------------------------------------------------------*/
int checkcpu (void)
{
uint pvr = get_pvr();
printf ("MPC7xx V%d.%d",(pvr >> 8) & 0xFF, pvr & 0xFF);
printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq()/1000000,
bab7xx_get_bus_freq()/1000000);
return (0);
}
/* ------------------------------------------------------------------------- */
int checkboard (void)
{
#ifdef CFG_ADDRESS_MAP_A
puts ("Board: ELTEC BAB7xx PReP\n");
#else
puts ("Board: ELTEC BAB7xx CHRP\n");
#endif
return (0);
}
/* ------------------------------------------------------------------------- */
int checkflash (void)
{
/* TODO: XXX XXX XXX */
printf ("2 MB ## Test not implemented yet ##\n");
return (0);
}
/* ------------------------------------------------------------------------- */
static unsigned int mpc106_read_cfg_dword (unsigned int reg)
{
unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
out32r(MPC106_REG_ADDR, reg_addr);
return (in32r(MPC106_REG_DATA | (reg & 0x3)));
}
/* ------------------------------------------------------------------------- */
long int dram_size (int board_type)
{
/* No actual initialisation to do - done when setting up
* PICRs MCCRs ME/SARs etc in ram_init.S.
*/
register unsigned long i, msar1, mear1, memSize;
#if defined(CFG_MEMTEST)
register unsigned long reg;
printf("Testing DRAM\n");
/* write each mem addr with it's address */
for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
*reg = reg;
for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
{
if (*reg != reg)
return -1;
}
#endif
/*
* Since MPC106 memory controller chip has already been set to
* control all memory, just read and interpret its memory boundery register.
*/
memSize = 0;
msar1 = mpc106_read_cfg_dword(MPC106_MSAR1);
mear1 = mpc106_read_cfg_dword(MPC106_MEAR1);
i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf;
do
{
if (i & 0x01) /* is bank enabled ? */
memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
msar1 >>= 8;
mear1 >>= 8;
i >>= 1;
} while (i);
return (memSize * 0x100000);
}
/* ------------------------------------------------------------------------- */
long int initdram(int board_type)
{
return dram_size(board_type);
}
/* ------------------------------------------------------------------------- */
void after_reloc (ulong dest_addr)
{
DECLARE_GLOBAL_DATA_PTR;
/*
* Jump to the main U-Boot board init code
*/
board_init_r(gd, dest_addr);
}
/* ------------------------------------------------------------------------- */
/*
* do_reset is done here because in this case it is board specific, since the
* 7xx CPUs can only be reset by external HW (the RTC in this case).
*/
void
do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
#if defined(CONFIG_RTC_MK48T59)
/* trigger watchdog immediately */
rtc_set_watchdog(1, RTC_WD_RB_16TH);
#else
#error "You must define the macro CONFIG_RTC_MK48T59."
#endif
}
/* ------------------------------------------------------------------------- */
#if defined(CONFIG_WATCHDOG)
/*
* Since the 7xx CPUs don't have an internal watchdog, this function is
* board specific. We use the RTC here.
*/
void watchdog_reset(void)
{
#if defined(CONFIG_RTC_MK48T59)
/* we use a 32 sec watchdog timer */
rtc_set_watchdog(8, RTC_WD_RB_4);
#else
#error "You must define the macro CONFIG_RTC_MK48T59."
#endif
}
#endif /* CONFIG_WATCHDOG */
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CONSOLE_EXTRA_INFO
extern GraphicDevice smi;
void video_get_info_str (int line_number, char *info)
{
/* init video info strings for graphic console */
switch (line_number)
{
case 1:
sprintf (info," MPC7xx V%d.%d at %ld / %ld MHz",
(get_pvr() >> 8) & 0xFF,
get_pvr() & 0xFF,
bab7xx_get_gclk_freq()/1000000,
bab7xx_get_bus_freq()/1000000);
return;
case 2:
sprintf (info, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
dram_size(0)/0x100000,
flash_init()/0x100000);
return;
case 3:
sprintf (info, " %s", smi.modeIdent);
return;
}
/* no more info lines */
*info = 0;
return;
}
#endif
/*---------------------------------------------------------------------------*/
/*
* (C) Copyright 2002 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <mpc106.h>
#include <video_fb.h>
/* ------------------------------------------------------------------------- */
int checkboard (void)
{
puts ("Board: ELTEC PowerPC\n");
return (0);
}
/* ------------------------------------------------------------------------- */
int checkflash (void)
{
/* TODO */
printf ("Test not implemented !\n");
return (0);
}
/* ------------------------------------------------------------------------- */
static unsigned int mpc106_read_cfg_dword (unsigned int reg)
{
unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
out32r(MPC106_REG_ADDR, reg_addr);
return (in32r(MPC106_REG_DATA | (reg & 0x3)));
}
/* ------------------------------------------------------------------------- */
long int dram_size (int board_type)
{
/*
* No actual initialisation to do - done when setting up
* PICRs MCCRs ME/SARs etc in asm_init.S.
*/
register unsigned long i, msar1, mear1, memSize;
#if defined(CFG_MEMTEST)
register unsigned long reg;
printf("Testing DRAM\n");
/* write each mem addr with it's address */
for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
*reg = reg;
for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4)
{
if (*reg != reg)
return -1;
}
#endif
/*
* Since MPC107 memory controller chip has already been set to
* control all memory, just read and interpret its memory boundery register.
*/
memSize = 0;
msar1 = mpc106_read_cfg_dword(MPC106_MSAR1);
mear1 = mpc106_read_cfg_dword(MPC106_MEAR1);
i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf;
do
{
if (i & 0x01) /* is bank enabled ? */
memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
msar1 >>= 8;
mear1 >>= 8;
i >>= 1;
} while (i);
return (memSize * 0x100000);
}
/* ------------------------------------------------------------------------- */
long int initdram(int board_type)
{
return dram_size(board_type);
}
/* ------------------------------------------------------------------------- */
/*
* The BAB 911 can be reset by writing bit 0 of the Processor Initialization
* Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
* Memory Block).
*/
void do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
out8(MPC107_EUMB_PI, 1);
}
/* ------------------------------------------------------------------------- */
#if defined(CONFIG_WATCHDOG)
/*
* Since the 7xx CPUs don't have an internal watchdog, this function is
* board specific.
*/
void watchdog_reset(void)
{
}
#endif /* CONFIG_WATCHDOG */
/* ------------------------------------------------------------------------- */
void after_reloc (ulong dest_addr)
{
DECLARE_GLOBAL_DATA_PTR;
/*
* Jump to the main U-Boot board init code
*/
board_init_r(gd, dest_addr);
}
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CONSOLE_EXTRA_INFO
extern GraphicDevice smi;
void video_get_info_str (int line_number, char *info)
{
/* init video info strings for graphic console */
switch (line_number)
{
case 1:
sprintf (info," MPC7xx V%d.%d at %d / %d MHz",
(get_pvr() >> 8) & 0xFF,
get_pvr() & 0xFF,
400,
100);
return;
case 2:
sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH",
dram_size(0)/0x100000,
flash_init()/0x100000);
return;
case 3:
sprintf (info, " %s", smi.modeIdent);
return;
}
/* no more info lines */
*info = 0;
return;
}
#endif