Commit 803d01ed authored by Stephen Warren's avatar Stephen Warren Committed by Tom Warren

ARM: tegra: Tegra30 pinmux cleanup

This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.

The entries in tegra30_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

This introduces a few changes to pin/group/function naming and the set of
available functions for each pin. The new values now exactly match the
TRM; the chip documentation. I adjusted one entry in
pinmux-config-cardhu.h due to this.
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Acked-by: default avatarSimon Glass <sjg@chromium.org>
Signed-off-by: default avatarTom Warren <twarren@nvidia.com>
parent 70ad375e
......@@ -29,14 +29,18 @@ int funcmux_select(enum periph_id id, int config)
case PERIPH_ID_UART1:
switch (config) {
case FUNCMUX_UART1_ULPI:
pinmux_set_func(PINGRP_ULPI_DATA0, PMUX_FUNC_UARTA);
pinmux_set_func(PINGRP_ULPI_DATA1, PMUX_FUNC_UARTA);
pinmux_set_func(PINGRP_ULPI_DATA2, PMUX_FUNC_UARTA);
pinmux_set_func(PINGRP_ULPI_DATA3, PMUX_FUNC_UARTA);
pinmux_tristate_disable(PINGRP_ULPI_DATA0);
pinmux_tristate_disable(PINGRP_ULPI_DATA1);
pinmux_tristate_disable(PINGRP_ULPI_DATA2);
pinmux_tristate_disable(PINGRP_ULPI_DATA3);
pinmux_set_func(PMUX_PINGRP_ULPI_DATA0_PO1,
PMUX_FUNC_UARTA);
pinmux_set_func(PMUX_PINGRP_ULPI_DATA1_PO2,
PMUX_FUNC_UARTA);
pinmux_set_func(PMUX_PINGRP_ULPI_DATA2_PO3,
PMUX_FUNC_UARTA);
pinmux_set_func(PMUX_PINGRP_ULPI_DATA3_PO4,
PMUX_FUNC_UARTA);
pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA0_PO1);
pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA1_PO2);
pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA2_PO3);
pinmux_tristate_disable(PMUX_PINGRP_ULPI_DATA3_PO4);
break;
}
break;
......
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