Commit 81e60235 authored by Peter Tyser's avatar Peter Tyser Committed by Tom Rix

ppc: Clean up calling of phy_reset() during init

Remove board-specific #ifdefs for calling phy_reset() during
initializtion
Signed-off-by: default avatarPeter Tyser <ptyser@xes-inc.com>
parent b3ab9dfd
......@@ -38,6 +38,7 @@
#define CONFIG_MPC860 1 /* This is a MPC860 CPU ... */
#define CONFIG_CCM 1 /* on a Card Controller Module */
#define CONFIG_MISC_INIT_R /* Call misc_init_r() */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
......
......@@ -57,6 +57,7 @@
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
/* BOOT arguments */
#define CONFIG_PREBOOT \
......
......@@ -36,6 +36,7 @@
#define CONFIG_MPC860 1 /* This is a MPC860 CPU */
#define CONFIG_IP860 1 /* ...on a IP860 board */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#define CONFIG_BAUDRATE 9600
......
......@@ -52,6 +52,8 @@
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
#define CONFIG_8xx_GCLK_FREQ 50331648
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define CONFIG_SHOW_BOOT_PROGRESS 1 /* Show boot progress on LEDs */
#if 0
......
......@@ -49,6 +49,8 @@
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 115200
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
#define CONFIG_8xx_GCLK_FREQ 50331648
......
......@@ -81,6 +81,7 @@
#endif /* CONFIG_ADSTYPE == CONFIG_SYS_8272ADS */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
/* allow serial and ethaddr to be overwritten */
#define CONFIG_ENV_OVERWRITE
......
......@@ -54,6 +54,7 @@
#define CONFIG_CPM2 1 /* Has a CPM2 */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
/* allow serial and ethaddr to be overwritten */
#define CONFIG_ENV_OVERWRITE
......
......@@ -48,6 +48,7 @@
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
/*
* sysclk for MPC85xx
......
......@@ -189,6 +189,7 @@
#define CONFIG_CPM2 1 /* Has a CPM2 */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
/*
* Miscellaneous configurable options
......
......@@ -77,6 +77,7 @@
#undef CONFIG_BTB /* toggle branch predition */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
......
......@@ -36,6 +36,8 @@
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
#define CONFIG_SPD823TS 1 /* ...on a SPD823TS board */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
#undef CONFIG_8xx_CONS_SMC2
#undef CONFIG_8xx_CONS_NONE
......
......@@ -43,6 +43,7 @@
#define CONFIG_PCU_E 1 /* ...on a PCU E board */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r() */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
......
......@@ -71,6 +71,7 @@
#undef CONFIG_BTB /* toggle branch predition */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
......
......@@ -66,6 +66,7 @@
#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */
......
......@@ -1000,22 +1000,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
eth_initialize (bd);
#endif
#if defined(CONFIG_CMD_NET) && ( \
defined(CONFIG_CCM) || \
defined(CONFIG_ELPT860) || \
defined(CONFIG_EP8260) || \
defined(CONFIG_IP860) || \
defined(CONFIG_IVML24) || \
defined(CONFIG_IVMS8) || \
defined(CONFIG_MPC8260ADS) || \
defined(CONFIG_MPC8266ADS) || \
defined(CONFIG_MPC8560ADS) || \
defined(CONFIG_PCU_E) || \
defined(CONFIG_RPXSUPER) || \
defined(CONFIG_STXGP3) || \
defined(CONFIG_SPD823TS) || \
defined(CONFIG_RESET_PHY_R) )
#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
WATCHDOG_RESET ();
debug ("Reset Ethernet PHY\n");
reset_phy ();
......
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