Commit 8a316c9b authored by Stefan Roese's avatar Stefan Roese Committed by Stefan Roese

Major cleanup for AMCC PPC4xx eval boards.

Patch by Stefan Roese, 01 Aug 2005
parent c157d8e2
......@@ -2,6 +2,18 @@
Changes for U-Boot 1.1.3:
======================================================================
* Patch by Stefan Roese, 01 Aug 2005:
- Major cleanup for AMCC eval boards Walnut, Bubinga, Ebony, Ocotea
(former IBM eval board). Please see "doc/README.AMCC-eval-boards-cleanup"
for details.
- Sycamore (PPC405GPr) eval board added (Walnut port is extended
to run on both 405GP and 405GPr eval boards).
* Patch by Steven Blakeslee, 27 Jul 2005:
- Add support for AMCC PPC440EP/GR.
- Add support for AMCC Yosemite PPC440EP eval board.
- Add support for AMCC Yellowstone PPC440GR eval board.
* Fix sysmon POST problem: check I2C error codes
This fixes a problem of displaying bogus voltages when the voltages
are so low that the I2C devices start failing while the rest of the
......
......@@ -210,6 +210,11 @@ Keith Outwater <Keith_Outwater@mvis.com>
GEN860T MPC860T
GEN860T_SC MPC860T
Stefan Roese <sr@denx.de>
sycamore PPC4xx
walnut PPC4xx
Frank Panno <fpanno@delphintech.com>
ep8260 MPC8260
......@@ -327,7 +332,6 @@ Unknown / orphaned boards:
CRAYL1 PPC4xx
ERIC PPC4xx
WALNUT405 PPC4xx
MOUSSE MPC824x
......
......@@ -60,16 +60,17 @@ LIST_8xx=" \
#########################################################################
LIST_4xx=" \
ADCIOP AR405 ASH405 BUBINGA405EP \
ADCIOP AR405 ASH405 bubinga \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 csb272 \
csb472 DASA_SIM DP405 DU405 \
EBONY ERIC EXBITGEN HUB405 \
ebony ERIC EXBITGEN HUB405 \
JSE MIP405 MIP405T ML2 \
ml300 OCOTEA OCRTC ORSG \
ml300 ocotea OCRTC ORSG \
PCI405 PIP405 PLU405 PMC405 \
PPChameleonEVB VOH405 W7OLMC W7OLMG \
WALNUT405 WUH405 XPEDITE1K \
walnut WUH405 XPEDITE1K yellowstone \
yosemite \
"
#########################################################################
......
......@@ -707,8 +707,11 @@ AR405_config: unconfig
ASH405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ash405 esd
BUBINGA405EP_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx bubinga405ep
bamboo_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx bamboo amcc
bubinga_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx bubinga amcc
CANBT_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx canbt esd
......@@ -759,8 +762,8 @@ DP405_config: unconfig
DU405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx du405 esd
EBONY_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ebony
ebony_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ebony amcc
ERIC_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx eric
......@@ -794,8 +797,8 @@ ML2_config: unconfig
ml300_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ml300 xilinx
OCOTEA_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ocotea
ocotea_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ocotea amcc
OCRTC_config \
ORSG_config: unconfig
......@@ -846,6 +849,10 @@ PPChameleonEVB_HI_33_config: unconfig
sbc405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx sbc405
sycamore_config: unconfig
@echo "Configuring for sycamore board as subset of walnut..."
@./mkconfig -a walnut ppc ppc4xx walnut amcc
VOH405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx voh405 esd
......@@ -856,8 +863,8 @@ W7OLMC_config \
W7OLMG_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx w7o
WALNUT405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx walnut405
walnut_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx walnut amcc
WUH405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx wuh405 esd
......@@ -865,6 +872,12 @@ WUH405_config: unconfig
XPEDITE1K_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx xpedite1k
yosemite_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx yosemite amcc
yellowstone_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx yellowstone amcc
#########################################################################
## MPC8220 Systems
#########################################################################
......
......@@ -295,7 +295,7 @@ The following options need to be configured:
CONFIG_FADS823 CONFIG_NETVIA CONFIG_V37
CONFIG_FADS850SAR CONFIG_NX823 CONFIG_W7OLMC
CONFIG_FADS860T CONFIG_OCRTC CONFIG_W7OLMG
CONFIG_FLAGADM CONFIG_ORSG CONFIG_WALNUT405
CONFIG_FLAGADM CONFIG_ORSG CONFIG_WALNUT
CONFIG_FPS850L CONFIG_OXC CONFIG_ZPC1900
CONFIG_FPS860L CONFIG_ZUMA
......@@ -2192,7 +2192,7 @@ configurations; the following names are supported:
FADS850SAR_config omap1610h2_config TQM850L_config
FADS860T_config omap1610inn_config TQM855L_config
FPS850L_config omap5912osk_config TQM860L_config
omap2420h4_config WALNUT405_config
omap2420h4_config walnut_config
Yukon8220_config
ZPC1900_config
......@@ -3135,7 +3135,7 @@ locked as (mis-) used as memory, etc.
CFG_INIT_RAM_ADDR should be somewhere that won't interfere
with your processor/board/system design. The default value
you will find in any recent u-boot distribution in
Walnut405.h should work for you. I'd set it to a value larger
walnut.h should work for you. I'd set it to a value larger
than your SDRAM module. If you have a 64MB SDRAM module, set
it above 400_0000. Just make sure your board has no resources
that are supposed to respond to that address! That code in
......
#
# (C) Copyright 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o
#OBJS += flash.o
SOBJS = init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
sinclude .depend
#########################################################################
This diff is collapsed.
#
# (C) Copyright 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# esd ADCIOP boards
#
#TEXT_BASE = 0x00001000
ifeq ($(ramsym),1)
TEXT_BASE = 0xFBD00000
else
TEXT_BASE = 0xFFF80000
endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
endif
/*
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <ppc_asm.tmpl>
#include <config.h>
/* General */
#define TLB_VALID 0x00000200
/* Supported page sizes */
#define SZ_1K 0x00000000
#define SZ_4K 0x00000010
#define SZ_16K 0x00000020
#define SZ_64K 0x00000030
#define SZ_256K 0x00000040
#define SZ_1M 0x00000050
#define SZ_8M 0x00000060
#define SZ_16M 0x00000070
#define SZ_256M 0x00000090
/* Storage attributes */
#define SA_W 0x00000800 /* Write-through */
#define SA_I 0x00000400 /* Caching inhibited */
#define SA_M 0x00000200 /* Memory coherence */
#define SA_G 0x00000100 /* Guarded */
#define SA_E 0x00000080 /* Endian */
/* Access control */
#define AC_X 0x00000024 /* Execute */
#define AC_W 0x00000012 /* Write */
#define AC_R 0x00000009 /* Read */
/* Some handy macros */
#define EPN(e) ((e) & 0xfffffc00)
#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
#define TLB2(a) ( (a)&0x00000fbf )
#define tlbtab_start\
mflr r1 ;\
bl 0f ;
#define tlbtab_end\
.long 0, 0, 0 ; \
0: mflr r0 ; \
mtlr r1 ; \
blr ;
#define tlbentry(epn,sz,rpn,erpn,attr)\
.long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
/**************************************************************************
* TLB TABLE
*
* This table is used by the cpu boot code to setup the initial tlb
* entries. Rather than make broad assumptions in the cpu source tree,
* this table lets each board set things up however they like.
*
* Pointer to the table is returned in r1
*
*************************************************************************/
.section .bootpg,"ax"
.globl tlbtab
tlbtab:
tlbtab_start
/*
0xf0000000 must be first, before relocation SA_I must be off to use the
dcache as stack. It is patched after relocation to enable SA_I
*/
tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
tlbentry( CFG_PCI_BASE, SZ_256M, 0xE0000000, 0, AC_R|AC_W|SA_G|SA_I )
tlbentry( CFG_NVRAM_BASE_ADDR, SZ_16K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
/* PCI */
tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
/* USB 2.0 Device */
tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I )
tlbtab_end
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/bamboo/init.o (.text)
cpu/ppc4xx/kgdb.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/serial.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
cpu/ppc4xx/405gp_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/environment.o(.text)*/
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}
......@@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
SOBJS = init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS)
......
/*
* (C) Copyright 2000
* (C) Copyright 2000-2005
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
......@@ -20,98 +20,65 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
long int spd_sdram (void);
long int spd_sdram(void);
#include <common.h>
#include <asm/processor.h>
int board_early_init_f (void)
int board_early_init_f(void)
{
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr (uicer, 0x00000000); /* disable all ints */
mtdcr (uiccr, 0x00000010);
mtdcr (uicpr, 0xFFFF7FF0); /* set int polarities */
mtdcr (uictr, 0x00000010); /* set int trigger levels */
mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
#if 0
#define mtebc(reg, data) mtdcr(ebccfga,reg);mtdcr(ebccfgd,data)
/* CS1 */
/* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */
mtebc (pb1ap, 0x02815480);
mtebc (pb1cr, 0xF0018000);
p = (unsigned int*)0xEF600708;
t = *p;
t = t | 0x00000400;
*p = t;
/* BAS=0xF01,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */
mtebc (pb2ap, 0x04815A80);
mtebc (pb2cr, 0xF0118000);
/* BAS=0xF02,BS=0x0(1MB),BU=0x3(R/W),BW=0x0( 8 bits) */
mtebc (pb3ap, 0x01815280);
mtebc (pb3cr, 0xF0218000);
/* BAS=0xF03,BS=0x0(1MB),BU=0x3(R/W),BW=0x0(8 bits) */
mtebc (pb7ap, 0x01815280);
mtebc (pb7cr, 0xF0318000);
/* set UART1 control to select CTS/RTS */
#define FPGA_BRDC 0xF0300004
*(volatile char *) (FPGA_BRDC) |= 0x1;
#endif
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr(uicer, 0x00000000); /* disable all ints */
mtdcr(uiccr, 0x00000010);
mtdcr(uicpr, 0xFFFF7FF0); /* set int polarities */
mtdcr(uictr, 0x00000010); /* set int trigger levels */
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
return 0;
}
/* ------------------------------------------------------------------------- */
/*
* Check Board Identity:
*/
int checkboard (void)
int checkboard(void)
{
unsigned char *s = getenv ("serial#");
unsigned char *s = getenv("serial#");
puts ("Board: IBM 405EP Eval Board");
puts("Board: Bubinga - AMCC PPC405EP Evaluation Board");
if (s != NULL) {
puts (", serial# ");
puts (s);
puts(", serial# ");
puts(s);
}
putc ('\n');
putc('\n');
return (0);
}
/*
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
*/
void sdram_init(void)
{
return;
}
/* -------------------------------------------------------------------------
initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
the necessary info for SDRAM controller configuration
------------------------------------------------------------------------- */
long int initdram (int board_type)
long int initdram(int board_type)
{
long int ret;
ret = spd_sdram ();
ret = spd_sdram();
return ret;
}
/* ------------------------------------------------------------------------- */
int testdram (void)
int testdram(void)
{
/* TODO: XXX XXX XXX */
printf ("test: xxx MB - ok\n");
printf("test: xxx MB - ok\n");
return (0);
}
/* ------------------------------------------------------------------------- */
......@@ -21,9 +21,4 @@
# MA 02111-1307 USA
#
#
# esd ADCIOP boards
#
#TEXT_BASE = 0xFFFE0000
TEXT_BASE = 0xFFF80000
TEXT_BASE = 0xFFFC0000
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Modified 4/5/2001
* Wait for completion of each sector erase command issued
* 4/5/2001
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
*/
#include <common.h>
#include <ppc4xx.h>
#include <asm/processor.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
#undef DEBUG
#ifdef DEBUG
#define DEBUGF(x...) printf(x)
#else
#define DEBUGF(x...)
#endif /* DEBUG */
/*
* include common flash code (for amcc boards)
*/
#include "../common/flash.c"
/*-----------------------------------------------------------------------
* Functions
*/
static ulong flash_get_size(vu_long * addr, flash_info_t * info);
static void flash_get_offsets(ulong base, flash_info_t * info);
unsigned long flash_init(void)
{
unsigned long size_b0, size_b1;
int i;
uint pbcr;
unsigned long base_b0, base_b1;
/* Init: no FLASHes known */
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
size_b0 =
flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0 << 20);
}
/* Only one bank */
if (CFG_MAX_FLASH_BANKS == 1) {
/* Setup offsets */
flash_get_offsets(FLASH_BASE0_PRELIM, &flash_info[0]);
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
&flash_info[0]);
#ifdef CFG_ENV_IS_IN_FLASH
(void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,