Commit 8ca78f2c authored by Peter Tyser's avatar Peter Tyser Committed by Wolfgang Denk

fsl: Clean up printing of PCI boot info

Previously boards used a variety of indentations, newline styles, and
colon styles for the PCI information that is printed on bootup.  This
patch unifies the style to look like:

...
NAND:  1024 MiB
PCIE1: connected as Root Complex
           Scanning PCI bus 01
        04  01  8086  1010  0200  00
        04  01  8086  1010  0200  00
        03  00  10b5  8112  0604  00
        02  01  10b5  8518  0604  00
        02  02  10b5  8518  0604  00
        08  00  1957  0040  0b20  00
        07  00  10b5  8518  0604  00
        09  00  10b5  8112  0604  00
        07  01  10b5  8518  0604  00
        07  02  10b5  8518  0604  00
        06  00  10b5  8518  0604  00
        02  03  10b5  8518  0604  00
        01  00  10b5  8518  0604  00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
           Scanning PCI bus 0d
        0d  00  1957  0040  0b20  00
PCIE2: Bus 0c - 0d
In:    serial
...
Signed-off-by: default avatarPeter Tyser <ptyser@xes-inc.com>
CC: wd@denx.de
CC: sr@denx.de
CC: galak@kernel.crashing.org
parent a72dbae2
......@@ -218,14 +218,14 @@ void pci_init_board(void)
pcie1_hose.region_count = 1;
#endif
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
printf ("PCIE1: connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
......@@ -242,7 +242,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
......@@ -254,7 +254,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI: disabled\n");
printf("PCI1: disabled\n");
}
puts("\n");
......@@ -267,11 +267,11 @@ void pci_init_board(void)
SET_STD_PCI_INFO(pci_info[num], 2);
pci_agent = fsl_setup_hose(&pci2_hose, pci_info[num].regs);
puts (" PCI2\n");
puts("PCI2\n");
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI2: disabled\n");
printf("PCI2: disabled\n");
}
puts("\n");
#else
......
......@@ -68,13 +68,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_1);
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf(" PCIE1 connected to Slot 1 as %s (base addr %lx)\n",
printf("PCIE1: connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
#else
setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE1); /* disable */
......@@ -90,13 +90,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_2);
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf(" PCIE2 connected to Slot 3 as %s (base addr %lx)\n",
printf("PCIE2: connected to Slot 3 as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
printf (" PCIE2: disabled\n");
printf("PCIE2: disabled\n");
}
#else
setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE2); /* disable */
......@@ -112,13 +112,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_3);
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
printf(" PCIE3 connected to Slot 2 as %s (base addr %lx)\n",
printf("PCIE3: connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
} else {
printf (" PCIE3: disabled\n");
printf("PCIE3: disabled\n");
}
#else
setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE3); /* disable */
......@@ -134,13 +134,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_4);
SET_STD_PCIE_INFO(pci_info[num], 4);
pcie_ep = fsl_setup_hose(&pcie4_hose, pci_info[num].regs);
printf(" PCIE4 connected to as %s (base addr %lx)\n",
printf("PCIE4: connected to as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie4_hose, first_free_busno);
} else {
printf (" PCIE4: disabled\n");
printf("PCIE4: disabled\n");
}
#else
setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE4); /* disable */
......
......@@ -229,13 +229,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_3);
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
printf (" PCIE3 connected to Slot3 as %s (base address %lx)\n",
printf("PCIE3: connected to Slot3 as %s (base address %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
} else {
printf (" PCIE3: disabled\n");
printf("PCIE3: disabled\n");
}
puts("\n");
......@@ -253,13 +253,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_1);
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot1 as %s (base address %lx)\n",
printf("PCIE1: connected to Slot1 as %s (base address %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
......@@ -277,13 +277,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_2);
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf (" PCIE2 connected to Slot 2 as %s (base address %lx)\n",
printf("PCIE2: connected to Slot 2 as %s (base address %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
printf (" PCIE2: disabled\n");
printf("PCIE2: disabled\n");
}
puts("\n");
......@@ -304,7 +304,7 @@ void pci_init_board(void)
LAW_TRGT_IF_PCI);
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
......@@ -316,7 +316,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI: disabled\n");
printf("PCI: disabled\n");
}
puts("\n");
......
......@@ -47,10 +47,10 @@ int checkboard (void)
puts("Board: ADS\n");
#ifdef CONFIG_PCI
printf(" PCI1: 32 bit, %d MHz (compiled)\n",
printf("PCI1: 32 bit, %d MHz (compiled)\n",
CONFIG_SYS_CLK_FREQ / 1000000);
#else
printf(" PCI1: disabled\n");
printf("PCI1: disabled\n");
#endif
/*
......
......@@ -221,17 +221,17 @@ int checkboard (void)
MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
printf (" PCI1: %d bit, %s MHz, %s\n",
printf("PCI1: %d bit, %s MHz, %s\n",
(pci1_32) ? 32 : 64,
(pci1_speed == 33000000) ? "33" :
(pci1_speed == 66000000) ? "66" : "unknown",
pci1_clk_sel ? "sync" : "async");
if (pci_dual) {
printf (" PCI2: 32 bit, 66 MHz, %s\n",
printf("PCI2: 32 bit, 66 MHz, %s\n",
pci2_clk_sel ? "sync" : "async");
} else {
printf (" PCI2: disabled\n");
printf("PCI2: disabled\n");
}
/*
......
......@@ -142,9 +142,9 @@ void pci_init_board(void)
pcie3_hose.region_count = 1;
#endif
printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE3: connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
......@@ -154,7 +154,7 @@ void pci_init_board(void)
*/
in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BUS);
} else {
printf (" PCIE3: disabled\n");
printf("PCIE3: disabled\n");
}
puts("\n");
#else
......@@ -177,14 +177,14 @@ void pci_init_board(void)
pcie1_hose.region_count = 1;
#endif
printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
......@@ -208,13 +208,13 @@ void pci_init_board(void)
pcie2_hose.region_count = 1;
#endif
printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
printf (" PCIE2: disabled\n");
printf("PCIE2: disabled\n");
}
puts("\n");
......@@ -231,7 +231,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
......@@ -243,7 +243,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI: disabled\n");
printf("PCI: disabled\n");
}
puts("\n");
......
......@@ -284,7 +284,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
......@@ -308,7 +308,7 @@ void pci_init_board(void)
}
#endif
} else {
printf (" PCI: disabled\n");
printf("PCI: disabled\n");
}
puts("\n");
......@@ -321,10 +321,10 @@ void pci_init_board(void)
uint pci2_clk_sel = porpllsr & 0x4000; /* PORPLLSR[17] */
uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
if (pci_dual) {
printf (" PCI2: 32 bit, 66 MHz, %s\n",
printf("PCI2: 32 bit, 66 MHz, %s\n",
pci2_clk_sel ? "sync" : "async");
} else {
printf (" PCI2: disabled\n");
printf("PCI2: disabled\n");
}
}
#else
......@@ -337,14 +337,14 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
......
......@@ -219,17 +219,17 @@ int checkboard (void)
MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
printf (" PCI1: %d bit, %s MHz, %s\n",
printf("PCI1: %d bit, %s MHz, %s\n",
(pci1_32) ? 32 : 64,
(pci1_speed == 33000000) ? "33" :
(pci1_speed == 66000000) ? "66" : "unknown",
pci1_clk_sel ? "sync" : "async");
if (pci_dual) {
printf (" PCI2: 32 bit, 66 MHz, %s\n",
printf("PCI2: 32 bit, 66 MHz, %s\n",
pci2_clk_sel ? "sync" : "async");
} else {
printf (" PCI2: disabled\n");
printf("PCI2: disabled\n");
}
/*
......
......@@ -252,10 +252,10 @@ int checkboard (void)
puts("Board: ADS\n");
#ifdef CONFIG_PCI
printf(" PCI1: 32 bit, %d MHz (compiled)\n",
printf("PCI1: 32 bit, %d MHz (compiled)\n",
CONFIG_SYS_CLK_FREQ / 1000000);
#else
printf(" PCI1: disabled\n");
printf("PCI1: disabled\n");
#endif
/*
......
......@@ -378,7 +378,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
......@@ -390,7 +390,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI: disabled\n");
printf("PCI: disabled\n");
}
puts("\n");
......@@ -404,14 +404,14 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
......
......@@ -584,13 +584,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
......
......@@ -192,9 +192,9 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE3: connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
/*
......@@ -211,7 +211,7 @@ void pci_init_board(void)
in_be32(p);
}
} else {
printf (" PCIE3: disabled\n");
printf("PCIE3: disabled\n");
}
puts("\n");
#else
......@@ -224,13 +224,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
printf (" PCIE2: disabled\n");
printf("PCIE2: disabled\n");
}
puts("\n");
......@@ -244,13 +244,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
......
......@@ -244,14 +244,14 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf (" PCIE1 connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
......@@ -265,13 +265,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf (" PCIE2 connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE2: connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
printf (" PCIE2: disabled\n");
printf("PCIE2: disabled\n");
}
puts("\n");
......@@ -283,14 +283,14 @@ void pci_init_board(void)
if (!(devdisr & MPC86xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
printf(" PCI connected to PCI slots as %s" \
printf("PCI: connected to PCI slots as %s" \
" (base address %lx)\n",
pci_agent ? "Agent" : "Host",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI: disabled\n");
printf("PCI: disabled\n");
}
puts("\n");
......
......@@ -157,9 +157,9 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf(" PCIE1 connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
......@@ -171,22 +171,22 @@ void pci_init_board(void)
+ CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000)));
} else {
puts(" PCIE1: disabled\n");
puts("PCIE1: disabled\n");
}
#else
puts(" PCIE1: disabled\n");
puts("PCIE1: disabled\n");
#endif /* CONFIG_PCIE1 */
#ifdef CONFIG_PCIE2
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf(" PCIE2 connected as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE2: connected as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
#else
puts(" PCIE2: disabled\n");
puts("PCIE2: disabled\n");
#endif /* CONFIG_PCIE2 */
}
......
......@@ -225,7 +225,7 @@ static void configure_pcie(struct fsl_pci_info *info,
set_next_law(info->mem_phys, law_size_bits(info->mem_size), info->law);
set_next_law(info->io_phys, law_size_bits(info->io_size), info->law);
is_endpoint = fsl_setup_hose(hose, info->regs);
printf(" PCIE%u connected to %s as %s (base addr %lx)\n",
printf("PCIE%u: connected to %s as %s (base addr %lx)\n",
info->pci_num, connected,
is_endpoint ? "Endpoint" : "Root Complex", info->regs);
bus_number = fsl_pci_init_port(info, hose, bus_number);
......@@ -255,7 +255,7 @@ void pci_init_board(void)
SET_STD_PCIE_INFO(pci_info, 1);
configure_pcie(&pci_info, &pcie1_hose, serdes_slot_name(PCIE1));
} else {
printf(" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
......@@ -266,7 +266,7 @@ void pci_init_board(void)
SET_STD_PCIE_INFO(pci_info, 2);
configure_pcie(&pci_info, &pcie2_hose, serdes_slot_name(PCIE2));
} else {
printf(" PCIE2: disabled\n");
printf("PCIE2: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */
......@@ -277,7 +277,7 @@ void pci_init_board(void)
SET_STD_PCIE_INFO(pci_info, 3);
configure_pcie(&pci_info, &pcie3_hose, serdes_slot_name(PCIE3));
} else {
printf(" PCIE3: disabled\n");
printf("PCIE3: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */
......
......@@ -65,13 +65,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf(" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
printf (" PCIE2: disabled\n");
printf("PCIE2: disabled\n");
}
puts("\n");
#else
......@@ -84,13 +84,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
#else
......
......@@ -218,9 +218,9 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) {
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
printf(" PCIE2 connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE2: connected to ULI as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
......@@ -245,7 +245,7 @@ void pci_init_board(void)
}
#endif
} else {
printf(" PCIE2: disabled\n");
printf("PCIE2: disabled\n");
}
puts("\n");
#else
......@@ -258,13 +258,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) {
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
printf(" PCIE3 connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE3: connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
} else {
printf(" PCIE3: disabled\n");
printf("PCIE3: disabled\n");
}
puts("\n");
#else
......@@ -277,13 +277,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf(" PCIE1: disabled\n");
printf("PCIE1: disabled\n");
}
puts("\n");
#else
......
......@@ -59,10 +59,10 @@ int checkboard (void)
puts("Board: MicroSys PM854\n");