Commit 93f26f13 authored by Claudiu Manoil's avatar Claudiu Manoil Committed by York Sun

net: Merge asm/fsl_enet.h into fsl_mdio.h

fsl_enet.h defines the mapping of the usual MII management
registers, which are included in the MDIO register block
common to Freescale ethernet controllers. So it shouldn't
depend on the CPU architecture but it should be actually
part of the arch independent fsl_mdio.h.

To remove the arch dependency, merge the content of
asm/fsl_enet.h into fsl_mdio.h.
Some files (like fm_eth.h) were simply including fsl_enet.h
only for phy.h. These were updated to include phy.h instead.
Signed-off-by: default avatarClaudiu Manoil <claudiu.manoil@freescale.com>
parent df0a5b88
/*
* Copyright 2010 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_PPC_FSL_ENET_H
#define __ASM_PPC_FSL_ENET_H
#include <phy.h>
struct tsec_mii_mng {
u32 miimcfg; /* MII management configuration reg */
u32 miimcom; /* MII management command reg */
u32 miimadd; /* MII management address reg */
u32 miimcon; /* MII management control reg */
u32 miimstat; /* MII management status reg */
u32 miimind; /* MII management indication reg */
u32 ifstat; /* Interface Status Register */
} __attribute__ ((packed));
int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc);
#endif /* __ASM_PPC_FSL_ENET_H */
......@@ -11,13 +11,13 @@
#include <i2c.h>
#include <miiphy.h>
#include <phy.h>
#include <fsl_mdio.h>
#if defined(CONFIG_PCI)
#include <pci.h>
#endif
#include <spd_sdram.h>
#include <asm/mmu.h>
#include <asm/io.h>
#include <asm/fsl_enet.h>
#include <asm/mmu.h>
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
......
......@@ -10,7 +10,6 @@
#include <i2c.h>
#include <asm/io.h>
#include <asm/fsl_mpc83xx_serdes.h>
#include <asm/fsl_enet.h>
#include <spd_sdram.h>
#include <tsec.h>
#include <libfdt.h>
......
......@@ -7,7 +7,6 @@
#include <common.h>
#include <asm/types.h>
#include <asm/io.h>
#include <asm/fsl_enet.h>
#include <asm/fsl_dtsec.h>
#include <fsl_mdio.h>
#include <phy.h>
......
......@@ -8,8 +8,8 @@
#define __FM_H__
#include <common.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/fsl_enet.h>
#include <asm/fsl_fman.h>
/* Port ID */
......
......@@ -6,6 +6,7 @@
#include <common.h>
#include <asm/io.h>
#include <asm/fsl_serdes.h>
#include <fsl_mdio.h>
#include "fm.h"
......
......@@ -12,7 +12,6 @@
#include <phy.h>
#include <asm/types.h>
#include <asm/io.h>
#include <asm/fsl_enet.h>
#include <asm/fsl_memac.h>
#include "fm.h"
......
......@@ -12,7 +12,6 @@
#include <phy.h>
#include <asm/types.h>
#include <asm/io.h>
#include <asm/fsl_enet.h>
#include <asm/fsl_tgec.h>
#include "fm.h"
......
......@@ -11,7 +11,6 @@
#include <fsl_mdio.h>
#include <asm/io.h>
#include <asm/errno.h>
#include <asm/fsl_enet.h>
void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr,
int dev_addr, int regnum, int value)
......
......@@ -13,7 +13,6 @@
#include "qe.h"
#include "uccf.h"
#include <phy.h>
#include <asm/fsl_enet.h>
#define MAX_TX_THREADS 8
#define MAX_RX_THREADS 8
......
......@@ -8,8 +8,8 @@
#define __FM_ETH_H__
#include <common.h>
#include <phy.h>
#include <asm/types.h>
#include <asm/fsl_enet.h>
enum fm_port {
FM1_DTSEC1,
......
......@@ -10,7 +10,18 @@
#include <net.h>
#include <miiphy.h>
#include <asm/fsl_enet.h>
struct tsec_mii_mng {
u32 miimcfg; /* MII management configuration reg */
u32 miimcom; /* MII management command reg */
u32 miimadd; /* MII management address reg */
u32 miimcon; /* MII management control reg */
u32 miimstat; /* MII management status reg */
u32 miimind; /* MII management indication reg */
u32 ifstat; /* Interface Status Register */
};
int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc);
/* PHY register offsets */
#define PHY_EXT_PAGE_ACCESS 0x1f
......
......@@ -20,7 +20,7 @@
#include <net.h>
#include <config.h>
#include <phy.h>
#include <asm/fsl_enet.h>
#include <fsl_mdio.h>
#define TSEC_SIZE 0x01000
#define TSEC_MDIO_OFFSET 0x01000
......
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