Commit 997399fa authored by Prabhakar Kushwaha's avatar Prabhakar Kushwaha Committed by York Sun

powerpc: Fix CamelCase checkpatch warnings

85xx, 86xx PowerPC folders have code variables with CamelCase naming conventions.
because of this code checkpatch script generates "WARNING: Avoid CamelCase".

Convert variables name to normal naming convention and modify board, driver
files with updated the new structure.
Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: default avatarYork Sun <yorksun@freescale.com>
parent 5d97fe2a
......@@ -135,78 +135,79 @@ int checkcpu (void)
if (!(i & 3))
printf ("\n ");
printf("CPU%d:%-4s MHz, ", core,
strmhz(buf1, sysinfo.freqProcessor[core]));
strmhz(buf1, sysinfo.freq_processor[core]));
}
printf("\n CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus));
printf("\n CCB:%-4s MHz,", strmhz(buf1, sysinfo.freq_systembus));
printf("\n");
#ifdef CONFIG_FSL_CORENET
if (ddr_sync == 1) {
printf(" DDR:%-4s MHz (%s MT/s data rate) "
"(Synchronous), ",
strmhz(buf1, sysinfo.freqDDRBus/2),
strmhz(buf2, sysinfo.freqDDRBus));
strmhz(buf1, sysinfo.freq_ddrbus/2),
strmhz(buf2, sysinfo.freq_ddrbus));
} else {
printf(" DDR:%-4s MHz (%s MT/s data rate) "
"(Asynchronous), ",
strmhz(buf1, sysinfo.freqDDRBus/2),
strmhz(buf2, sysinfo.freqDDRBus));
strmhz(buf1, sysinfo.freq_ddrbus/2),
strmhz(buf2, sysinfo.freq_ddrbus));
}
#else
switch (ddr_ratio) {
case 0x0:
printf(" DDR:%-4s MHz (%s MT/s data rate), ",
strmhz(buf1, sysinfo.freqDDRBus/2),
strmhz(buf2, sysinfo.freqDDRBus));
strmhz(buf1, sysinfo.freq_ddrbus/2),
strmhz(buf2, sysinfo.freq_ddrbus));
break;
case 0x7:
printf(" DDR:%-4s MHz (%s MT/s data rate) "
"(Synchronous), ",
strmhz(buf1, sysinfo.freqDDRBus/2),
strmhz(buf2, sysinfo.freqDDRBus));
strmhz(buf1, sysinfo.freq_ddrbus/2),
strmhz(buf2, sysinfo.freq_ddrbus));
break;
default:
printf(" DDR:%-4s MHz (%s MT/s data rate) "
"(Asynchronous), ",
strmhz(buf1, sysinfo.freqDDRBus/2),
strmhz(buf2, sysinfo.freqDDRBus));
strmhz(buf1, sysinfo.freq_ddrbus/2),
strmhz(buf2, sysinfo.freq_ddrbus));
break;
}
#endif
#if defined(CONFIG_FSL_LBC)
if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
if (sysinfo.freq_localbus > LCRR_CLKDIV) {
printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
} else {
printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
sysinfo.freqLocalBus);
sysinfo.freq_localbus);
}
#endif
#if defined(CONFIG_FSL_IFC)
printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
#endif
#ifdef CONFIG_CPM2
printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freq_systembus));
#endif
#ifdef CONFIG_QE
printf(" QE:%-4s MHz\n", strmhz(buf1, sysinfo.freqQE));
printf(" QE:%-4s MHz\n", strmhz(buf1, sysinfo.freq_qe));
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
for (i = 0; i < CONFIG_SYS_NUM_FMAN; i++) {
printf(" FMAN%d: %s MHz\n", i + 1,
strmhz(buf1, sysinfo.freqFMan[i]));
strmhz(buf1, sysinfo.freq_fman[i]));
}
#endif
#ifdef CONFIG_SYS_DPAA_QBMAN
printf(" QMAN: %s MHz\n", strmhz(buf1, sysinfo.freqQMAN));
printf(" QMAN: %s MHz\n", strmhz(buf1, sysinfo.freq_qman));
#endif
#ifdef CONFIG_SYS_DPAA_PME
printf(" PME: %s MHz\n", strmhz(buf1, sysinfo.freqPME));
printf(" PME: %s MHz\n", strmhz(buf1, sysinfo.freq_pme));
#endif
puts("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n");
......
......@@ -403,22 +403,22 @@ static void ft_fixup_dpaa_clks(void *blob)
get_sys_info(&sysinfo);
#ifdef CONFIG_SYS_DPAA_FMAN
ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
sysinfo.freqFMan[0]);
sysinfo.freq_fman[0]);
#if (CONFIG_SYS_NUM_FMAN == 2)
ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
sysinfo.freqFMan[1]);
sysinfo.freq_fman[1]);
#endif
#endif
#ifdef CONFIG_SYS_DPAA_QBMAN
do_fixup_by_compat_u32(blob, "fsl,qman",
"clock-frequency", sysinfo.freqQMAN, 1);
"clock-frequency", sysinfo.freq_qman, 1);
#endif
#ifdef CONFIG_SYS_DPAA_PME
do_fixup_by_compat_u32(blob, "fsl,pme",
"clock-frequency", sysinfo.freqPME, 1);
"clock-frequency", sysinfo.freq_pme, 1);
#endif
}
#else
......@@ -616,7 +616,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
while (off != -FDT_ERR_NOTFOUND) {
u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
val = cpu_to_fdt32(sysinfo.freq_processor[*reg]);
fdt_setprop(blob, off, "clock-frequency", &val, 4);
off = fdt_node_offset_by_prop_value(blob, off, "device_type",
"cpu", 4);
......
This diff is collapsed.
......@@ -72,17 +72,17 @@ checkcpu(void)
get_sys_info(&sysinfo);
puts("Clock Configuration:\n");
printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor));
printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freq_processor));
printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freq_systembus));
printf(" DDR:%-4s MHz (%s MT/s data rate), ",
strmhz(buf1, sysinfo.freqSystemBus / 2),
strmhz(buf2, sysinfo.freqSystemBus));
strmhz(buf1, sysinfo.freq_systembus / 2),
strmhz(buf2, sysinfo.freq_systembus));
if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
if (sysinfo.freq_localbus > LCRR_CLKDIV) {
printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
} else {
printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
sysinfo.freqLocalBus);
sysinfo.freq_localbus);
}
puts("L1: D-cache 32 KB enabled\n");
......@@ -131,7 +131,7 @@ get_tbclk(void)
sys_info_t sys_info;
get_sys_info(&sys_info);
return (sys_info.freqSystemBus + 3L) / 4L;
return (sys_info.freq_systembus + 3L) / 4L;
}
......
......@@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* used in some defintiions of CONFIG_SYS_CLK_FREQ */
extern unsigned long get_board_sys_clk(unsigned long dummy);
void get_sys_info(sys_info_t *sysInfo)
void get_sys_info(sys_info_t *sys_info)
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
......@@ -31,7 +31,7 @@ void get_sys_info(sys_info_t *sysInfo)
switch (plat_ratio) {
case 0x0:
sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
sys_info->freq_systembus = 16 * CONFIG_SYS_CLK_FREQ;
break;
case 0x02:
case 0x03:
......@@ -43,10 +43,10 @@ void get_sys_info(sys_info_t *sysInfo)
case 0x0a:
case 0x0c:
case 0x10:
sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ;
break;
default:
sysInfo->freqSystemBus = 0;
sys_info->freq_systembus = 0;
break;
}
......@@ -55,25 +55,26 @@ void get_sys_info(sys_info_t *sysInfo)
switch (e600_ratio) {
case 0x10:
sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
sys_info->freq_processor = 2 * sys_info->freq_systembus;
break;
case 0x19:
sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus / 2;
sys_info->freq_processor = 5 * sys_info->freq_systembus / 2;
break;
case 0x20:
sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
sys_info->freq_processor = 3 * sys_info->freq_systembus;
break;
case 0x39:
sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus / 2;
sys_info->freq_processor = 7 * sys_info->freq_systembus / 2;
break;
case 0x28:
sysInfo->freqProcessor = 4 * sysInfo->freqSystemBus;
sys_info->freq_processor = 4 * sys_info->freq_systembus;
break;
case 0x1d:
sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus / 2;
sys_info->freq_processor = 9 * sys_info->freq_systembus / 2;
break;
default:
sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
sys_info->freq_processor = e600_ratio +
sys_info->freq_systembus;
break;
}
......@@ -84,10 +85,11 @@ void get_sys_info(sys_info_t *sysInfo)
lcrr_div = in_be32(&immap->im_lbc.lcrr) & LCRR_CLKDIV;
#endif
if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
sysInfo->freqLocalBus = sysInfo->freqSystemBus / (lcrr_div * 2);
sys_info->freq_localbus = sys_info->freq_systembus
/ (lcrr_div * 2);
} else {
/* In case anyone cares what the unknown value is */
sysInfo->freqLocalBus = lcrr_div;
sys_info->freq_localbus = lcrr_div;
}
}
......@@ -102,9 +104,9 @@ int get_clocks(void)
sys_info_t sys_info;
get_sys_info(&sys_info);
gd->cpu_clk = sys_info.freqProcessor;
gd->bus_clk = sys_info.freqSystemBus;
gd->arch.lbc_clk = sys_info.freqLocalBus;
gd->cpu_clk = sys_info.freq_processor;
gd->bus_clk = sys_info.freq_systembus;
gd->arch.lbc_clk = sys_info.freq_localbus;
/*
* The base clock for I2C depends on the actual SOC. Unfortunately,
......@@ -114,9 +116,9 @@ int get_clocks(void)
* AN2919.
*/
#ifdef CONFIG_MPC8610
gd->arch.i2c1_clk = sys_info.freqSystemBus;
gd->arch.i2c1_clk = sys_info.freq_systembus;
#else
gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
#endif
gd->arch.i2c2_clk = gd->arch.i2c1_clk;
......@@ -138,7 +140,7 @@ ulong get_bus_freq(ulong dummy)
sys_info_t sys_info;
get_sys_info(&sys_info);
val = sys_info.freqSystemBus;
val = sys_info.freq_systembus;
return val;
}
......@@ -68,7 +68,7 @@ local_bus_init(void)
get_sys_info(&sysinfo);
clkdiv = lbc->lcrr & LCRR_CLKDIV;
lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
if (lbc_hz < 66) {
lbc->lcrr = CONFIG_SYS_LBC_LCRR | LCRR_DBYP; /* DLL Bypass */
......
......@@ -250,7 +250,7 @@ local_bus_init(void)
get_sys_info(&sysinfo);
clkdiv = lbc->lcrr & LCRR_CLKDIV;
lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
if (lbc_hz < 66) {
lbc->lcrr |= LCRR_DBYP; /* DLL Bypass */
......
......@@ -248,7 +248,7 @@ local_bus_init(void)
get_sys_info(&sysinfo);
clkdiv = lbc->lcrr & LCRR_CLKDIV;
lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
if (lbc_hz < 66) {
lbc->lcrr |= LCRR_DBYP; /* DLL Bypass */
......
......@@ -273,7 +273,7 @@ local_bus_init(void)
get_sys_info(&sysinfo);
clkdiv = lbc->lcrr & LCRR_CLKDIV;
lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
if (lbc_hz < 66) {
lbc->lcrr = CONFIG_SYS_LBC_LCRR | LCRR_DBYP; /* DLL Bypass */
......
......@@ -247,7 +247,7 @@ phys_size_t fixed_sdram(void)
get_sys_info(&sysinfo);
printf("Configuring DDR for %s MT/s data rate\n",
strmhz(buf, sysinfo.freqDDRBus));
strmhz(buf, sysinfo.freq_ddrbus));
ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
......
......@@ -53,7 +53,7 @@ phys_size_t fixed_sdram(void)
get_sys_info(&sysinfo);
printf("Configuring DDR for %s MT/s data rate\n",
strmhz(buf, sysinfo.freqDDRBus));
strmhz(buf, sysinfo.freq_ddrbus));
ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
......
......@@ -65,8 +65,8 @@ local_bus_init(void)
get_sys_info(&sysinfo);
lbc_mhz = sysinfo.freqLocalBus / 1000000;
clkdiv = sysinfo.freqSystemBus / sysinfo.freqLocalBus;
lbc_mhz = sysinfo.freq_localbus / 1000000;
clkdiv = sysinfo.freq_systembus / sysinfo.freq_localbus;
debug("LCRR=0x%x, CD=%d, MHz=%d\n", lcrr, clkdiv, lbc_mhz);
......
......@@ -143,7 +143,7 @@ void local_bus_init (void)
get_sys_info (&sysinfo);
clkdiv = lbc->lcrr & LCRR_CLKDIV;
lbc_mhz = sysinfo.freqSystemBus / 1000000 / clkdiv;
lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv;
/* Disable PLL bypass for Local Bus Clock >= 66 MHz */
if (lbc_mhz >= 66)
......
......@@ -210,7 +210,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
unsigned int datarate;
get_sys_info(&sysinfo);
datarate = sysinfo.freqDDRBus / 1000 / 1000;
datarate = sysinfo.freq_ddrbus / 1000 / 1000;
for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) {
if ((bopts[i].datarate_mhz_low <= datarate) &&
......
......@@ -75,7 +75,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
/* Set eSPI BRG clock source */
get_sys_info(&sysinfo);
spibrg = sysinfo.freqSystemBus / 2;
spibrg = sysinfo.freq_systembus / 2;
fsl->div16 = 0;
if ((spibrg / max_hz) > 32) {
fsl->div16 = ESPI_CSMODE_DIV16;
......
......@@ -10,19 +10,19 @@
typedef struct
{
unsigned long freqProcessor[CONFIG_MAX_CPUS];
unsigned long freqSystemBus;
unsigned long freqDDRBus;
unsigned long freqLocalBus;
unsigned long freqQE;
unsigned long freq_processor[CONFIG_MAX_CPUS];
unsigned long freq_systembus;
unsigned long freq_ddrbus;
unsigned long freq_localbus;
unsigned long freq_qe;
#ifdef CONFIG_SYS_DPAA_FMAN
unsigned long freqFMan[CONFIG_SYS_NUM_FMAN];
unsigned long freq_fman[CONFIG_SYS_NUM_FMAN];
#endif
#ifdef CONFIG_SYS_DPAA_QBMAN
unsigned long freqQMAN;
unsigned long freq_qman;
#endif
#ifdef CONFIG_SYS_DPAA_PME
unsigned long freqPME;
unsigned long freq_pme;
#endif
} MPC85xx_SYS_INFO;
......
......@@ -41,9 +41,9 @@
#ifndef __ASSEMBLY__
typedef struct {
unsigned long freqProcessor;
unsigned long freqSystemBus;
unsigned long freqLocalBus;
unsigned long freq_processor;
unsigned long freq_systembus;
unsigned long freq_localbus;
} MPC86xx_SYS_INFO;
#define l1icache_enable icache_enable
......
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