Commit 99aaa930 authored by Lin Huang's avatar Lin Huang Committed by Simon Glass

rockchip: rk3036: change ddr frequency to 400M

emac may use dpll as clock parent, and it request the clock frequency
multiples of 50, so change ddr frequency to 400M.
Signed-off-by: default avatarLin Huang <hl@rock-chips.com>
Signed-off-by: default avatarJeffy Chen <jeffy.chen@rock-chips.com>
Acked-by: default avatarSimon Glass <sjg@chromium.org>
parent deff6fb3
......@@ -37,7 +37,7 @@ struct rk3036_sdram_priv {
/* use integer mode, 396MHz dpll setting
* refdiv, fbdiv, postdiv1, postdiv2
*/
const struct pll_div dpll_init_cfg = {1, 66, 4, 1};
const struct pll_div dpll_init_cfg = {1, 50, 3, 1};
/* 396Mhz ddr timing */
const struct rk3036_ddr_timing ddr_timing = {0x18c,
......
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