Commit a425bf72 authored by Eric Nelson's avatar Eric Nelson Committed by Stefano Babic

ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routines

The DDR calibration routines are gated by conditionals for the
i.MX6DQ SOCs, but with the use of the sysinfo parameter, these
are usable on at least i.MX6SDL and i.MX6SL variants with DDR3.

Also, since only the Novena board currently uses the dynamic
DDR calibration routines, these routines waste space on other
boards using SPL.

Add a KConfig entry to allow boards to selectively include the
DDR calibration routines.
Signed-off-by: default avatarEric Nelson <eric@nelint.com>
parent 48c7d437
......@@ -35,6 +35,14 @@ config MX6ULL
bool
select MX6UL
config MX6_DDRCAL
bool "Include dynamic DDR calibration routines"
depends on SPL
default n
help
Say "Y" if your board uses dynamic (per-boot) DDR calibration.
If unsure, say N.
choice
prompt "MX6 board select"
optional
......
......@@ -14,8 +14,7 @@
#include <asm/types.h>
#include <wait_bit.h>
#if defined(CONFIG_MX6QDL) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
#if defined(CONFIG_MX6_DDRCAL)
static void reset_read_data_fifos(void)
{
struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
......
......@@ -458,7 +458,7 @@ void mx6sl_dram_iocfg(unsigned width,
const struct mx6sl_iomux_ddr_regs *,
const struct mx6sl_iomux_grp_regs *);
#if defined(CONFIG_MX6QDL) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
#if defined(CONFIG_MX6_DDRCAL)
int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo);
int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo);
void mmdc_read_calibration(struct mx6_ddr_sysinfo const *sysinfo,
......
......@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_KOSAGI_NOVENA=y
CONFIG_SPL_EXT_SUPPORT=y
CONFIG_SPL_FAT_SUPPORT=y
......
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