Commit ac6dbb85 authored by wdenk's avatar wdenk

Make compile clean, fix the usual small problems.

parent 2a46cabd
......@@ -103,7 +103,6 @@ int misc_init_r (void)
int status;
int index;
int i;
struct pci_config_regs *pci_regs;
unsigned int *ptr;
unsigned int *magic;
......
......@@ -351,6 +351,7 @@ void doc_init (void)
}
#endif
#ifdef CONFIG_PCI
struct pci_controller hose;
extern void pci_mpc8250_init(struct pci_controller *);
......@@ -359,3 +360,4 @@ void pci_init_board(void)
{
pci_mpc8250_init(&hose);
}
#endif
......@@ -21,6 +21,7 @@
#if (CONFIG_COMMANDS & CFG_CMD_DOC)
#include <linux/mtd/nftl.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ids.h>
#include <linux/mtd/doc2000.h>
......
......@@ -7,7 +7,6 @@
*/
#include <common.h>
#include <config.h>
#include <command.h>
#include <malloc.h>
#include <asm/io.h>
......
This diff is collapsed.
......@@ -62,7 +62,7 @@ $(LIB): .depend $(LIBOBJS)
$(OBJCOPY) -O srec $(<:.o=) $@
%.bin: %.srec
$(OBJCOPY) -O binary $< $@
$(OBJCOPY) -O binary $< $@ 2>/dev/null
#########################################################################
......
......@@ -303,7 +303,7 @@
#define CFG_EBC_PB3CR 0xF011A000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=16bit */
/* Memory Bank 4 (NVRAM/RTC) initialization */
//#define CFG_EBC_PB4AP 0x01805280 /* TWT=3,WBN=1,WBF=1,TH=1,SOR=1 */
/*#define CFG_EBC_PB4AP 0x01805280 / * TWT=3,WBN=1,WBF=1,TH=1,SOR=1 */
#define CFG_EBC_PB4AP 0x01805680 /* TWT=3,WBN=1,WBF=1,TH=3,SOR=1 */
#define CFG_EBC_PB4CR 0xF0218000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit */
......
......@@ -98,6 +98,7 @@
& ~CFG_CMD_JFFS2 \
& ~CFG_CMD_KGDB \
& ~CFG_CMD_MII \
& ~CFG_CMD_NAND \
& ~CFG_CMD_PCI \
& ~CFG_CMD_PCMCIA \
& ~CFG_CMD_SCSI \
......
......@@ -126,6 +126,7 @@
CFG_CMD_IDE | \
CFG_CMD_JFFS2 | \
CFG_CMD_KGDB | \
CFG_CMD_NAND | \
CFG_CMD_MII | \
CFG_CMD_PCI | \
CFG_CMD_PCMCIA | \
......
......@@ -125,6 +125,7 @@
CFG_CMD_IDE | \
CFG_CMD_JFFS2 | \
CFG_CMD_KGDB | \
CFG_CMD_NAND | \
CFG_CMD_MII | \
CFG_CMD_PCI | \
CFG_CMD_PCMCIA | \
......
......@@ -276,7 +276,7 @@
/* Memory Bank 2 (CAN0, 1) initialization */
#define CFG_EBC_PB2AP 0x010053C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
//#define CFG_EBC_PB2AP 0x038056C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
/*#define CFG_EBC_PB2AP 0x038056C0 / * BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
#define CFG_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
/* Memory Bank 3 (FPGA internal) initialization */
......
......@@ -198,7 +198,7 @@
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CFG_RESET_ADDRESS 0xFFFFFFFC /* "bad" address */
#define CFG_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */
/*
* For booting Linux, the board info and command line data
......
......@@ -282,6 +282,7 @@
~CFG_CMD_JFFS2 & \
~CFG_CMD_KGDB & \
~CFG_CMD_MII & \
~CFG_CMD_NAND & \
~CFG_CMD_PCI & \
~CFG_CMD_PCMCIA & \
~CFG_CMD_SCSI & \
......
......@@ -145,6 +145,7 @@
CFG_CMD_HWFLOW | \
CFG_CMD_IDE | \
CFG_CMD_JFFS2 | \
CFG_CMD_NAND | \
CFG_CMD_MII | \
CFG_CMD_PCMCIA | \
CFG_CMD_PCI | \
......
......@@ -81,13 +81,6 @@ struct DiskOnChip;
#define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV)
#define DOC_ECC_DIS (DOC_ECC_RESV)
struct Nand {
char floor, chip;
unsigned long curadr;
unsigned char curmode;
/* Also some erase/write/pipeline info when we get that far */
};
#define MAX_FLOORS 4
#define MAX_CHIPS 4
......
......@@ -5,10 +5,10 @@ dividend .req r0
divisor .req r1
result .req r2
curbit .req r3
ip .req r12
sp .req r13
lr .req r14
pc .req r15
/* ip .req r12 */
/* sp .req r13 */
/* lr .req r14 */
/* pc .req r15 */
.text
.globl __udivsi3
.type __udivsi3 ,function
......
......@@ -6,10 +6,10 @@ dividend .req r0
divisor .req r1
overdone .req r2
curbit .req r3
ip .req r12
sp .req r13
lr .req r14
pc .req r15
/* ip .req r12 */
/* sp .req r13 */
/* lr .req r14 */
/* pc .req r15 */
.text
.globl __umodsi3
.type __umodsi3 ,function
......
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