Commit afaa27bd authored by Wolfgang Denk's avatar Wolfgang Denk

barco: drop unsupported board configuration

The barco board appears to be unmaintained since it was added about 5
years ago. The environment location has probably never been correct.
Drop it.
Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
Cc: Marc Leeman <marc.leeman@barco.com>
Acked-by: default avatarStefan Roese <sr@denx.de>
parent 93b11400
......@@ -278,11 +278,6 @@ N: Thomas Lange
E: thomas@corelatus.se
D: Support for GTH, GTH2 and dbau1x00 boards; lots of PCMCIA fixes
N: Marc Leeman
E: marc.leeman@barco.com
D: Support for Barco Streaming Video Card (SVC) and Sample Compress Network (SCN)
W: www.barco.com
N: The LEOX team
E: team@leox.org
D: Support for LEOX boards, DS164x RTC
......
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS = $(BOARD).o flash.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
This port of U-Boot is tuned to run on a range of Barco Control Rooms
Streaming Video Solutions, including:
- Streaming Video Card (SVC)
- Sample Compress Network (SCN)
For more information, see http://www.barcocontrolrooms.com/
Code and configuration are originally based on the Sandpoint board
Marc Leeman <marc.leeman@barco.com>
/********************************************************************
*
* Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
*
* $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/barco.c,v $
* $Revision: 1.4 $
* $Author: mleeman $
* $Date: 2005/03/02 16:40:20 $
*
* Last ChangeLog Entry
* $Log: barco.c,v $
* Revision 1.4 2005/03/02 16:40:20 mleeman
* remove empty labels (3.4 complains)
*
* Revision 1.3 2005/02/21 12:48:58 mleeman
* update of copyright years (feedback wd)
*
* Revision 1.2 2005/02/21 10:10:53 mleeman
* - split up switch statement to a function call (Linux kernel coding guidelines)
* ( feedback wd)
*
* Revision 1.1 2005/02/14 09:31:07 mleeman
* renaming of files
*
* Revision 1.1 2005/02/14 09:23:46 mleeman
* - moved 'barcohydra' directory to a more generic barco; since we will be
* supporting and adding multiple boards
*
* Revision 1.3 2005/02/10 13:57:32 mleeman
* fixed flash corruption: I should exit from the moment I find the correct value
*
* Revision 1.2 2005/02/09 12:56:23 mleeman
* add generic header to track changes in sources
*
*
*******************************************************************/
/*
* (C) Copyright 2004
* Marc Leeman <marc.leeman@barco.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
#include <malloc.h>
#include <command.h>
#include "config.h"
#include "barco_svc.h"
#define TRY_WORKING (3)
#define BOOT_DEFAULT (2)
#define BOOT_WORKING (1)
int checkboard (void)
{
/*TODO: Check processor type */
puts ( "Board: Streaming Video Card for Hydra systems "
#ifdef CONFIG_MPC8240
"8240"
#endif
#ifdef CONFIG_MPC8245
"8245"
#endif
" Unity ##Test not implemented yet##\n");
return 0;
}
phys_size_t initdram (int board_type)
{
long size;
long new_bank0_end;
long mear1;
long emear1;
size = get_ram_size (CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
new_bank0_end = size - 1;
mear1 = mpc824x_mpc107_getreg (MEAR1);
emear1 = mpc824x_mpc107_getreg (EMEAR1);
mear1 = (mear1 & 0xFFFFFF00) |
((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
emear1 = (emear1 & 0xFFFFFF00) |
((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
mpc824x_mpc107_setreg (MEAR1, mear1);
mpc824x_mpc107_setreg (EMEAR1, emear1);
return (size);
}
/*
* Initialize PCI Devices, report devices found.
*/
#ifndef CONFIG_PCI_PNP
static struct pci_config_table pci_barcohydra_config_table[] = {
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
PCI_ENET0_MEMADDR,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
PCI_ENET1_MEMADDR,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } },
{ }
};
#endif
struct pci_controller hose = {
#ifndef CONFIG_PCI_PNP
config_table: pci_barcohydra_config_table,
#endif
};
void pci_init_board (void)
{
pci_mpc824x_init (&hose);
}
int write_flash (char *addr, char value)
{
char *adr = (char *)0xFF800000;
int cnt = 0;
char status,oldstatus;
*(adr+0x55) = 0xAA; udelay (1);
*(adr+0xAA) = 0x55; udelay (1);
*(adr+0x55) = 0xA0; udelay (1);
*addr = value;
status = *addr;
do {
oldstatus = status;
status = *addr;
if ((oldstatus & 0x40) == (status & 0x40)) {
return 4;
}
cnt++;
if (cnt > 10000) {
return 2;
}
} while ( (status & 0x20) == 0 );
oldstatus = *addr;
status = *addr;
if ((oldstatus & 0x40) == (status & 0x40)) {
return 0;
} else {
*(adr+0x55) = 0xF0;
return 1;
}
}
unsigned update_flash (unsigned char *buf)
{
switch ((*buf) & 0x3) {
case TRY_WORKING:
printf ("found 3 and converted it to 2\n");
write_flash ((char *)buf, (*buf) & 0xFE);
*((unsigned char *)0xFF800000) = 0xF0;
udelay (100);
printf ("buf [%#010x] %#010x\n", (unsigned)buf, (*buf));
/* XXX - fall through??? */
case BOOT_WORKING :
return BOOT_WORKING;
}
return BOOT_DEFAULT;
}
unsigned scan_flash (void)
{
char section[] = "kernel";
int cfgFileLen = (CONFIG_SYS_FLASH_ERASE_SECTOR_LENGTH >> 1);
int sectionPtr = 0;
int foundItem = 0; /* 0: None, 1: section found, 2: "=" found */
int bufPtr;
unsigned char *buf;
buf = (unsigned char*)(CONFIG_SYS_FLASH_RANGE_BASE + CONFIG_SYS_FLASH_RANGE_SIZE \
- CONFIG_SYS_FLASH_ERASE_SECTOR_LENGTH);
for (bufPtr = 0; bufPtr < cfgFileLen; ++bufPtr) {
if ((buf[bufPtr]==0xFF) && (*(int*)(buf+bufPtr)==0xFFFFFFFF)) {
return BOOT_DEFAULT;
}
/* This is the scanning loop, we try to find a particular
* quoted value
*/
switch (foundItem) {
case 0:
if ((section[sectionPtr] == 0)) {
++foundItem;
} else if (buf[bufPtr] == section[sectionPtr]) {
++sectionPtr;
} else {
sectionPtr = 0;
}
break;
case 1:
++foundItem;
break;
case 2:
++foundItem;
break;
case 3:
default:
return update_flash (&buf[bufPtr - 1]);
}
}
printf ("Failed to read %s\n",section);
return BOOT_DEFAULT;
}
TSBootInfo* find_boot_info (void)
{
unsigned bootimage = scan_flash ();
TSBootInfo* info = (TSBootInfo*)malloc (sizeof(TSBootInfo));
switch (bootimage) {
case TRY_WORKING:
info->address = CONFIG_SYS_WORKING_KERNEL_ADDRESS;
break;
case BOOT_WORKING :
info->address = CONFIG_SYS_WORKING_KERNEL_ADDRESS;
break;
case BOOT_DEFAULT:
default:
info->address= CONFIG_SYS_DEFAULT_KERNEL_ADDRESS;
}
info->size = *((unsigned int *)(info->address ));
return info;
}
void barcobcd_boot (void)
{
TSBootInfo* start;
char *bootm_args[2];
char *buf;
int cnt;
extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
buf = (char *)(0x00800000);
/* make certain there are enough chars to print the command line here!
*/
bootm_args[0] = (char *)malloc (16*sizeof(char));
bootm_args[1] = (char *)malloc (16*sizeof(char));
start = find_boot_info ();
printf ("Booting kernel at address %#10x with size %#10x\n",
start->address, start->size);
/* give length of the kernel image to bootm */
sprintf (bootm_args[0],"%x",start->size);
/* give address of the kernel image to bootm */
sprintf (bootm_args[1],"%x",(unsigned)buf);
printf ("flash address: %#10x\n",start->address+8);
printf ("buf address: %#10x\n",(unsigned)buf);
/* aha, we reserve 8 bytes here... */
for (cnt = 0; cnt < start->size ; cnt++) {
buf[cnt] = ((char *)start->address)[cnt+8];
}
/* initialise RAM memory */
*((unsigned int *)0xFEC00000) = 0x00141A98;
do_bootm (NULL,0,2,bootm_args);
}
int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
barcobcd_boot ();
return 0;
}
/* Currently, boot_working and boot_default are the same command. This is
* left in here to see what we'll do in the future */
U_BOOT_CMD (
try_working, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image",
""
);
U_BOOT_CMD (
boot_working, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image",
""
);
U_BOOT_CMD (
boot_default, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image",
""
);
/*
* We are not using serial communication, so just provide empty functions
*/
int serial_init (void)
{
return 0;
}
void serial_setbrg (void)
{
return;
}
void serial_putc (const char c)
{
return;
}
void serial_puts (const char *c)
{
return;
}
int serial_getc (void)
{
return 0;
}
int serial_tstc (void)
{
return 0;
}
/********************************************************************
*
* Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
*
* $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/barco_svc.h,v $
* $Revision: 1.2 $
* $Author: mleeman $
* $Date: 2005/02/21 12:48:58 $
*
* Last ChangeLog Entry
* $Log: barco_svc.h,v $
* Revision 1.2 2005/02/21 12:48:58 mleeman
* update of copyright years (feedback wd)
*
* Revision 1.1 2005/02/14 09:31:07 mleeman
* renaming of files
*
* Revision 1.1 2005/02/14 09:23:46 mleeman
* - moved 'barcohydra' directory to a more generic barco; since we will be
* supporting and adding multiple boards
*
* Revision 1.1 2005/02/08 15:40:19 mleeman
* modified and added platform files
*
* Revision 1.2 2005/01/25 08:05:04 mleeman
* more cleanup of the code
*
* Revision 1.1 2004/07/20 08:49:55 mleeman
* Working version of the default and nfs kernel booting.
*
*
*******************************************************************/
#ifndef _LOCAL_BARCOHYDRA_H_
#define _LOCAL_BARCOHYDRA_H_
#include <flash.h>
#include <asm/io.h>
/* Defines for the barcohydra board */
#ifndef CONFIG_SYS_FLASH_ERASE_SECTOR_LENGTH
#define CONFIG_SYS_FLASH_ERASE_SECTOR_LENGTH (0x10000)
#endif
#ifndef CONFIG_SYS_DEFAULT_KERNEL_ADDRESS
#define CONFIG_SYS_DEFAULT_KERNEL_ADDRESS (CONFIG_SYS_FLASH_BASE + 0x30000)
#endif
#ifndef CONFIG_SYS_WORKING_KERNEL_ADDRESS
#define CONFIG_SYS_WORKING_KERNEL_ADDRESS (0xFFE00000)
#endif
typedef struct SBootInfo {
unsigned int address;
unsigned int size;
unsigned char state;
}TSBootInfo;
/* barcohydra.c */
int checkboard(void);
phys_size_t initdram(int board_type);
void pci_init_board(void);
void check_flash(void);
int write_flash(char *addr, char value);
TSBootInfo* find_boot_info(void);
void final_boot(void);
#endif
/*
* (C) Copyright 2001
* Thomas Koeller, tkoeller@gmx.net
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __ASSEMBLY__
#define __ASSEMBLY__ 1
#endif
#include <asm-offsets.h>
#include <config.h>
#include <asm/processor.h>
#include <mpc824x.h>
#include <ppc_asm.tmpl>
#if defined(USE_DINK32)
/* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
#define MCCR1VAL ((CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
#else
#define MCCR1VAL (CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT)
#endif
.text
/* Values to program into memory controller registers */
tbl: .long MCCR1, MCCR1VAL
.long MCCR2, CONFIG_SYS_REFINT << MCCR2_REFINT_SHIFT
.long MCCR3
.long (((CONFIG_SYS_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
(CONFIG_SYS_REFREC << MCCR3_REFREC_SHIFT) | \
(CONFIG_SYS_RDLAT << MCCR3_RDLAT_SHIFT)
.long MCCR4
.long (CONFIG_SYS_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CONFIG_SYS_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
(CONFIG_SYS_REGISTERD_TYPE_BUFFER << 20) | \
(((CONFIG_SYS_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
((CONFIG_SYS_SDMODE_CAS_LAT << 4) | (CONFIG_SYS_SDMODE_WRAP << 3) | \
(CONFIG_SYS_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
(CONFIG_SYS_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
((CONFIG_SYS_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
.long MSAR1
.long (((CONFIG_SYS_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
(((CONFIG_SYS_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
(((CONFIG_SYS_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
(((CONFIG_SYS_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
.long EMSAR1
.long (((CONFIG_SYS_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
(((CONFIG_SYS_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
(((CONFIG_SYS_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
(((CONFIG_SYS_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
.long MSAR2
.long (((CONFIG_SYS_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
(((CONFIG_SYS_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
(((CONFIG_SYS_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
(((CONFIG_SYS_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
.long EMSAR2
.long (((CONFIG_SYS_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
(((CONFIG_SYS_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
(((CONFIG_SYS_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
(((CONFIG_SYS_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
.long MEAR1
.long (((CONFIG_SYS_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
(((CONFIG_SYS_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
(((CONFIG_SYS_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
(((CONFIG_SYS_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
.long EMEAR1
.long (((CONFIG_SYS_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
(((CONFIG_SYS_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
(((CONFIG_SYS_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
(((CONFIG_SYS_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
.long MEAR2
.long (((CONFIG_SYS_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
(((CONFIG_SYS_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
(((CONFIG_SYS_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
(((CONFIG_SYS_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
.long EMEAR2
.long (((CONFIG_SYS_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
(((CONFIG_SYS_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
(((CONFIG_SYS_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
(((CONFIG_SYS_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
.long 0
/*
* Early CPU initialization. Set up memory controller, so we can access any RAM at all. This
* must be done in assembly, since we have no stack at this point.
*/
.global early_init_f
early_init_f:
mflr r10
/* basic memory controller configuration */
lis r3, CONFIG_ADDR_HIGH
lis r4, CONFIG_DATA_HIGH
bl lab
lab: mflr r5
lwzu r0, tbl - lab(r5)
loop: lwz r1, 4(r5)
stwbrx r0, 0, r3
eieio
stwbrx r1, 0, r4
eieio
lwzu r0, 8(r5)
cmpli cr0, 0, r0, 0
bne cr0, loop
/* set bank enable bits */
lis r0, MBER@h
ori r0, 0, MBER@l
li r1, CONFIG_SYS_BANK_ENABLE
stwbrx r0, 0, r3
eieio
stb r1, 0(r4)
eieio
/* delay loop */
lis r0, 0x0003
mtctr r0
delay: bdnz delay
/* enable memory controller */
lis r0, MCCR1@h
ori r0, 0, MCCR1@l
stwbrx r0, 0, r3
eieio
lwbrx r0, 0, r4
oris r0, 0, MCCR1_MEMGO@h
stwbrx r0, 0, r4
eieio
/* set up stack pointer */
lis r1, CONFIG_SYS_INIT_SP_OFFSET@h
ori r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l
mtlr r10
blr
This diff is collapsed.
/********************************************************************
*
* Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
*
* $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/speed.h,v $
* $Revision: 1.2 $
* $Author: mleeman $
* $Date: 2005/02/21 12:48:58 $
*
* Last ChangeLog Entry
* $Log: speed.h,v $
* Revision 1.2 2005/02/21 12:48:58 mleeman
* update of copyright years (feedback wd)
*
* Revision 1.1 2005/02/14 09:23:46 mleeman
* - moved 'barcohydra' directory to a more generic barco; since we will be
* supporting and adding multiple boards
*
* Revision 1.2 2005/02/09 12:56:23 mleeman
* add generic header to track changes in sources
*
*
*******************************************************************/
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*-----------------------------------------------------------------------
* Timer value for timer 2, ICLK = 10
*
* SPEED_FCOUNT2 = GCLK / (16 * (TIMER_TMR_PS + 1))
* SPEED_TMR3_PS = (GCLK / (16 * SPEED_FCOUNT3)) - 1
*
* SPEED_FCOUNT2 timer 2 counting frequency
* GCLK CPU clock
* SPEED_TMR2_PS prescaler
*/
#define SPEED_TMR2_PS (250 - 1) /* divide by 250 */
/*-----------------------------------------------------------------------
* Timer value for PIT
*
* PIT_TIME = SPEED_PITC / PITRTCLK
* PITRTCLK = 8192
*/
#define SPEED_PITC (82 << 16) /* start counting from 82 */
/*
* The new value for PTA is calculated from
*
* PTA = (gclk * Trefresh) / (2 ^ (2 * DFBRG) * PTP * NCS)
*
* gclk CPU clock (not bus clock !)
* Trefresh Refresh cycle * 4 (four word bursts used)
* DFBRG For normal mode (no clock reduction) always 0
* PTP Prescaler (already adjusted for no. of banks and 4K / 8K refresh)
* NCS Number of SDRAM banks (chip selects) on this UPM.
*/
......@@ -147,7 +147,6 @@ TQM5200 powerpc mpc5xxx tqm5200 tqc - TQM5200:
MVBC_P powerpc mpc5xxx mvbc_p matrix_vision - MVBC_P:MVBC_P
sorcery powerpc mpc8220
A3000 powerpc mpc824x a3000
barco powerpc mpc824x
BMW powerpc mpc824x bmw
CU824 powerpc mpc824x cu824
eXalion powerpc mpc824x eXalion
......
......@@ -11,7 +11,8 @@ easily if here is something they might want to dig for...
Board Arch CPU removed Commit last known maintainer/contact
=============================================================================
ERIC powerpc 405GP - 2010-11-21 Swen Anderson <sand@peppercon.de>
barco powerpc MPC8245 - 2010-11-23 Marc Leeman <marc.leeman@barco.com>
ERIC powerpc 405GP d9ba451 2010-11-21 Swen Anderson <sand@peppercon.de>
VoVPN-GW_100MHz powerpc MPC8260 26fe3d2 2010-10-24 Juergen Selent <j.selent@elmeg.de>
NC650 powerpc MPC852 333d86d 2010-10-19 Wolfgang Denk <wd@denx.de>
CP850 powerpc MPC852 333d86d 2010-10-19 Wolfgang Denk <wd@denx.de>
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