Commit b625b9ae authored by Michal Simek's avatar Michal Simek

fpga: spartan2: Avoid CamelCase

No functional changes.
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 69c0d323
......@@ -47,7 +47,7 @@ Xilinx_Spartan3_Slave_Serial_fns pmc440_fpga_fns = {
};
#endif
Xilinx_Spartan2_Slave_Serial_fns ngcc_fpga_fns = {
xilinx_spartan2_slave_serial_fns ngcc_fpga_fns = {
ngcc_fpga_pre_config_fn,
ngcc_fpga_pgm_fn,
ngcc_fpga_clk_fn,
......
......@@ -27,7 +27,7 @@ Xilinx_Spartan3_Slave_Serial_fns fpga_fns = {
};
Xilinx_desc spartan3 = {
Xilinx_Spartan2,
xilinx_spartan2,
slave_serial,
XILINX_XC3S200_SIZE,
(void *) &fpga_fns,
......
......@@ -31,29 +31,29 @@
#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
#endif
static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
/* static int Spartan2_sp_info(Xilinx_desc *desc ); */
static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
/* static int spartan2_sp_info(Xilinx_desc *desc ); */
static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int Spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
/* static int Spartan2_ss_info(Xilinx_desc *desc ); */
static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
/* static int spartan2_ss_info(Xilinx_desc *desc ); */
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
int Spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
ret_val = Spartan2_ss_load (desc, buf, bsize);
ret_val = spartan2_ss_load(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
ret_val = Spartan2_sp_load (desc, buf, bsize);
ret_val = spartan2_sp_load(desc, buf, bsize);
break;
default:
......@@ -64,19 +64,19 @@ int Spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
ret_val = Spartan2_ss_dump (desc, buf, bsize);
ret_val = spartan2_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
ret_val = Spartan2_sp_dump (desc, buf, bsize);
ret_val = spartan2_sp_dump(desc, buf, bsize);
break;
default:
......@@ -87,7 +87,7 @@ int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
int Spartan2_info( Xilinx_desc *desc )
int spartan2_info(Xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
......@@ -96,10 +96,10 @@ int Spartan2_info( Xilinx_desc *desc )
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
PRINTF ("%s: start with interface functions @ 0x%p\n",
__FUNCTION__, fn);
......@@ -248,10 +248,10 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
if (fn) {
unsigned char *data = (unsigned char *) buf;
......@@ -296,10 +296,10 @@ static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
/* ------------------------------------------------------------------------- */
static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns;
xilinx_spartan2_slave_serial_fns *fn = desc->iface_fns;
int i;
unsigned char val;
......@@ -439,7 +439,7 @@ static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
static int Spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
/* Readback is only available through the Slave Parallel and */
/* boundary-scan interfaces. */
......
......@@ -149,11 +149,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
} else
switch (desc->family) {
case Xilinx_Spartan2:
case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
PRINTF ("%s: Launching the Spartan-II Loader...\n",
__FUNCTION__);
ret_val = Spartan2_load (desc, buf, bsize);
ret_val = spartan2_load(desc, buf, bsize);
#else
printf ("%s: No support for Spartan-II devices.\n",
__FUNCTION__);
......@@ -206,11 +206,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
} else
switch (desc->family) {
case Xilinx_Spartan2:
case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
PRINTF ("%s: Launching the Spartan-II Reader...\n",
__FUNCTION__);
ret_val = Spartan2_dump (desc, buf, bsize);
ret_val = spartan2_dump(desc, buf, bsize);
#else
printf ("%s: No support for Spartan-II devices.\n",
__FUNCTION__);
......@@ -262,7 +262,7 @@ int xilinx_info (Xilinx_desc * desc)
if (xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("Family: \t");
switch (desc->family) {
case Xilinx_Spartan2:
case xilinx_spartan2:
printf ("Spartan-II\n");
break;
case Xilinx_Spartan3:
......@@ -316,9 +316,9 @@ int xilinx_info (Xilinx_desc * desc)
if (desc->iface_fns) {
printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
switch (desc->family) {
case Xilinx_Spartan2:
case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
Spartan2_info (desc);
spartan2_info(desc);
#else
/* just in case */
printf ("%s: No support for Spartan-II devices.\n",
......
......@@ -10,9 +10,9 @@
#include <xilinx.h>
extern int Spartan2_load(Xilinx_desc *desc, const void *image, size_t size);
extern int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
extern int Spartan2_info(Xilinx_desc *desc);
int spartan2_load(Xilinx_desc *desc, const void *image, size_t size);
int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
int spartan2_info(Xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
......@@ -29,7 +29,7 @@ typedef struct {
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
} Xilinx_Spartan2_Slave_Parallel_fns;
} xilinx_spartan2_slave_parallel_fns;
/* Slave Serial Implementation function table */
typedef struct {
......@@ -40,7 +40,7 @@ typedef struct {
Xilinx_done_fn done;
Xilinx_wr_fn wr;
Xilinx_post_fn post;
} Xilinx_Spartan2_Slave_Serial_fns;
} xilinx_spartan2_slave_serial_fns;
/* Device Image Sizes
*********************************************************************/
......@@ -63,36 +63,36 @@ typedef struct {
*********************************************************************/
/* Spartan-II devices */
#define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie }
#define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie }
#define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie }
#define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie }
#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie }
#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie }
#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie }
#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie }
{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie }
#endif /* _SPARTAN2_H_ */
......@@ -26,7 +26,7 @@ typedef enum { /* typedef Xilinx_iface */
typedef enum { /* typedef Xilinx_Family */
min_xilinx_type, /* low range check value */
Xilinx_Spartan2, /* Spartan-II Family */
xilinx_spartan2, /* Spartan-II Family */
Xilinx_VirtexE, /* Virtex-E Family */
Xilinx_Virtex2, /* Virtex2 Family */
Xilinx_Spartan3, /* Spartan-III Family */
......
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