Commit b7588e3b authored by Nitin Garg's avatar Nitin Garg Committed by Stefano Babic

ARM: Add workaround for Cortex-A9 errata 761320

Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: default avatarNitin Garg <nitin.garg@freescale.com>
Acked-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
parent f71cbfe3
......@@ -567,6 +567,7 @@ The following options need to be configured:
CONFIG_ARM_ERRATA_743622
CONFIG_ARM_ERRATA_751472
CONFIG_ARM_ERRATA_794072
CONFIG_ARM_ERRATA_761320
If set, the workarounds for these ARM errata are applied early
during U-Boot startup. Note that these options force the
......
......@@ -222,6 +222,11 @@ ENTRY(cpu_init_cp15)
orr r0, r0, #1 << 11 @ set bit #11
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
#endif
#ifdef CONFIG_ARM_ERRATA_761320
mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
orr r0, r0, #1 << 21 @ set bit #21
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
#endif
mov pc, lr @ back to my caller
ENDPROC(cpu_init_cp15)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment