Commit bc8f8c26 authored by Ilya Yanok's avatar Ilya Yanok Committed by Wolfgang Denk

mpc8308_p1m: support for MPC8308 P1M board

This patch provides support for MPC8308 P1M board with the following
set of features:
 Dual UART is supported
 NOR flash is supported
 Both TSEC Ethernet controllers are supported
 PCI Express initialization is supported
 Both I2C controllers are supported
Signed-off-by: 's avatarIlya Yanok <yanok@emcraft.com>
Signed-off-by: 's avatarKim Phillips <kim.phillips@freescale.com>
parent 65ea7589
......@@ -486,6 +486,7 @@ Stephen Williams <steve@icarus.com>
Ilya Yanok <yanok@emcraft.com>
mpc8308_p1m MPC8308
MPC8308RDB MPC8308
Roy Zang <tie-fei.zang@freescale.com>
......
#
# (C) Copyright 2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# (C) Copyright 2010
# Ilya Yanok, Emcraft Systems, yanok@emcraft.com
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o sdram.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
ifndef TEXT_BASE
TEXT_BASE = 0xFC000000
endif
/*
* Copyright (C) 2010 Freescale Semiconductor, Inc.
* Copyright (C) 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <i2c.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <pci.h>
#include <mpc83xx.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_mpc83xx_serdes.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
printf("Board: MPC8308 P1M\n");
return 0;
}
static struct pci_region pcie_regions_0[] = {
{
.bus_start = CONFIG_SYS_PCIE1_MEM_BASE,
.phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
.size = CONFIG_SYS_PCIE1_MEM_SIZE,
.flags = PCI_REGION_MEM,
},
{
.bus_start = CONFIG_SYS_PCIE1_IO_BASE,
.phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
.size = CONFIG_SYS_PCIE1_IO_SIZE,
.flags = PCI_REGION_IO,
},
};
void pci_init_board(void)
{
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
sysconf83xx_t *sysconf = &immr->sysconf;
law83xx_t *pcie_law = sysconf->pcielaw;
struct pci_region *pcie_reg[] = { pcie_regions_0 };
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
/* Deassert the resets in the control register */
out_be32(&sysconf->pecr1, 0xE0008000);
udelay(2000);
/* Configure PCI Express Local Access Windows */
out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR);
out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB);
mpc83xx_pcie_init(1, pcie_reg, 0);
}
#if defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
fdt_fixup_dr_usb(blob, bd);
}
#endif
int board_eth_init(bd_t *bis)
{
int rv, num_if = 0;
/* Initialize TSECs first */
rv = cpu_eth_init(bis);
if (rv >= 0)
num_if += rv;
else
printf("ERROR: failed to initialize TSECs.\n");
rv = pci_eth_init(bis);
if (rv >= 0)
num_if += rv;
else
printf("ERROR: failed to initialize PCI Ethernet.\n");
return num_if;
}
/*
* Copyright (C) 2007 Freescale Semiconductor, Inc.
* Copyright (C) 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
*
* This files is mostly identical to the original from
* board/freescale/mpc8308rdb/sdram.c
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc83xx.h>
#include <asm/bitops.h>
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
/* Fixed sdram init -- doesn't use serial presence detect.
*
* This is useful for faster booting in configs where the RAM is unlikely
* to be changed, or for things like NAND booting where space is tight.
*/
static long fixed_sdram(void)
{
immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
u32 msize_log2 = __ilog2(msize);
out_be32(&im->sysconf.ddrlaw[0].bar,
CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000);
out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1));
out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE);
out_be32(&im->ddr.csbnds[0].csbnds, (msize - 1) >> 24);
out_be32(&im->ddr.cs_config[0], CONFIG_SYS_DDR_CS0_CONFIG);
/* Currently we use only one CS, so disable the other bank. */
out_be32(&im->ddr.cs_config[1], 0);
out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL);
out_be32(&im->ddr.timing_cfg_3, CONFIG_SYS_DDR_TIMING_3);
out_be32(&im->ddr.timing_cfg_1, CONFIG_SYS_DDR_TIMING_1);
out_be32(&im->ddr.timing_cfg_2, CONFIG_SYS_DDR_TIMING_2);
out_be32(&im->ddr.timing_cfg_0, CONFIG_SYS_DDR_TIMING_0);
out_be32(&im->ddr.sdram_cfg, CONFIG_SYS_DDR_SDRAM_CFG);
out_be32(&im->ddr.sdram_cfg2, CONFIG_SYS_DDR_SDRAM_CFG2);
out_be32(&im->ddr.sdram_mode, CONFIG_SYS_DDR_MODE);
out_be32(&im->ddr.sdram_mode2, CONFIG_SYS_DDR_MODE2);
out_be32(&im->ddr.sdram_interval, CONFIG_SYS_DDR_INTERVAL);
sync();
/* enable DDR controller */
setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
sync();
return get_ram_size(CONFIG_SYS_DDR_SDRAM_BASE, msize);
}
phys_size_t initdram(int board_type)
{
immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
u32 msize;
if ((in_be32(&im->sysconf.immrbar) & IMMRBAR_BASE_ADDR) != (u32)im)
return -1;
/* DDR SDRAM */
msize = fixed_sdram();
/* return total bus SDRAM size(bytes) -- DDR */
return msize;
}
......@@ -328,6 +328,7 @@ ppmc8260 powerpc mpc8260
RPXsuper powerpc mpc8260 rpxsuper
rsdproto powerpc mpc8260
MPC8266ADS powerpc mpc8260 mpc8266ads freescale
mpc8308_p1m powerpc mpc83xx
MPC8308RDB powerpc mpc83xx mpc8308rdb freescale
MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale
MPC8349EMDS powerpc mpc83xx mpc8349emds freescale
......
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