Commit bfd07670 authored by Tom Rini's avatar Tom Rini

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

  - Enable eMMC driver for LD11/LD20 SoCs
  - Refactoring of SoC init code
  - Bug fix of pinctrl driver
parents 373ae16c 2cfa35c4
......@@ -270,7 +270,7 @@
};
emmc: sdhc@5a000000 {
compatible = "cdns,sd4hc";
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
pinctrl-names = "default";
......@@ -279,7 +279,6 @@
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
/* mmc-hs400-1_8v; support depends on board design */
};
usb0: usb@5a800100 {
......
......@@ -344,7 +344,7 @@
};
emmc: sdhc@5a000000 {
compatible = "cdns,sd4hc";
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
pinctrl-names = "default";
......@@ -353,7 +353,6 @@
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
/* mmc-hs400-1_8v; support depends on board design */
};
sd: sdhc@5a400000 {
......
......@@ -4,8 +4,9 @@
ifdef CONFIG_SPL_BUILD
obj-y += init/ bcu/ memconf/
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/
obj-y += spl_board_init.o
obj-y += memconf.o
obj-y += bcu/
else
......@@ -15,6 +16,9 @@ obj-y += board_init.o
obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o
obj-y += reset.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o
obj-y += pinctrl-glue.o
endif
obj-y += boards.o
......@@ -22,9 +26,7 @@ obj-y += soc_info.o
obj-y += boot-mode/
obj-y += clk/
obj-y += dram/
obj-y += pinctrl-glue.o
obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
obj-$(CONFIG_DEBUG_UART_UNIPHIER) += debug-uart/
obj-$(CONFIG_CPU_V7) += arm32/
......
/*
* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2011-2014 Panasonic Corporation
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
......@@ -11,7 +13,7 @@
#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
int uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
{
int shift;
......@@ -30,6 +32,4 @@ int uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
shift -= 32;
writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
return 0;
}
/*
* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2011-2014 Panasonic Corporation
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
......@@ -11,7 +13,7 @@
#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)
void uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)
{
int shift;
......@@ -34,6 +36,4 @@ int uniphier_sld3_bcu_init(const struct uniphier_board_data *bd)
shift -= 32;
writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
return 0;
}
......@@ -48,122 +48,193 @@ static void uniphier_setup_xirq(void)
writel(tmp, 0x55000090);
}
static void uniphier_nand_pin_init(bool cs2)
#ifdef CONFIG_ARCH_UNIPHIER_LD11
static void uniphier_ld11_misc_init(void)
{
#ifdef CONFIG_NAND_DENALI
if (uniphier_pin_init(cs2 ? "nand2cs_grp" : "nand_grp"))
pr_err("failed to init NAND pins\n");
#endif
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
}
#endif
int board_init(void)
#ifdef CONFIG_ARCH_UNIPHIER_LD20
static void uniphier_ld20_misc_init(void)
{
const struct uniphier_board_data *bd;
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
/* ES1 errata: increase VDD09 supply to suppress VBO noise */
if (uniphier_get_soc_revision() == 1) {
writel(0x00000003, 0x6184e004);
writel(0x00000100, 0x6184e040);
writel(0x0000b500, 0x6184e024);
writel(0x00000001, 0x6184e000);
}
led_puts("U0");
cci500_init(2);
}
#endif
bd = uniphier_get_board_param();
if (!bd)
return -ENODEV;
struct uniphier_initdata {
enum uniphier_soc_id soc_id;
bool nand_2cs;
void (*sbc_init)(void);
void (*pll_init)(void);
void (*clk_init)(void);
void (*misc_init)(void);
};
switch (uniphier_get_soc_type()) {
struct uniphier_initdata uniphier_initdata[] = {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
case SOC_UNIPHIER_SLD3:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_sld3_pll_init();
uniphier_ld4_clk_init();
break;
{
.soc_id = SOC_UNIPHIER_SLD3,
.nand_2cs = true,
.sbc_init = uniphier_sbc_init_admulti,
.pll_init = uniphier_sld3_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
case SOC_UNIPHIER_LD4:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_ld4_pll_init();
uniphier_ld4_clk_init();
break;
{
.soc_id = SOC_UNIPHIER_LD4,
.nand_2cs = true,
.sbc_init = uniphier_ld4_sbc_init,
.pll_init = uniphier_ld4_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
case SOC_UNIPHIER_PRO4:
uniphier_nand_pin_init(false);
led_puts("U1");
uniphier_pro4_pll_init();
uniphier_pro4_clk_init();
break;
{
.soc_id = SOC_UNIPHIER_PRO4,
.nand_2cs = false,
.sbc_init = uniphier_sbc_init_savepin,
.pll_init = uniphier_pro4_pll_init,
.clk_init = uniphier_pro4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
case SOC_UNIPHIER_SLD8:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_ld4_pll_init();
uniphier_ld4_clk_init();
break;
{
.soc_id = SOC_UNIPHIER_SLD8,
.nand_2cs = true,
.sbc_init = uniphier_ld4_sbc_init,
.pll_init = uniphier_ld4_pll_init,
.clk_init = uniphier_ld4_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
case SOC_UNIPHIER_PRO5:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pro5_clk_init();
break;
{
.soc_id = SOC_UNIPHIER_PRO5,
.nand_2cs = true,
.sbc_init = uniphier_sbc_init_savepin,
.clk_init = uniphier_pro5_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
case SOC_UNIPHIER_PXS2:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pxs2_clk_init();
break;
{
.soc_id = SOC_UNIPHIER_PXS2,
.nand_2cs = true,
.sbc_init = uniphier_pxs2_sbc_init,
.clk_init = uniphier_pxs2_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
case SOC_UNIPHIER_LD6B:
uniphier_nand_pin_init(true);
led_puts("U1");
uniphier_pxs2_clk_init();
break;
{
.soc_id = SOC_UNIPHIER_LD6B,
.nand_2cs = true,
.sbc_init = uniphier_pxs2_sbc_init,
.clk_init = uniphier_pxs2_clk_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11)
case SOC_UNIPHIER_LD11:
uniphier_nand_pin_init(false);
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
led_puts("U1");
uniphier_ld11_pll_init();
uniphier_ld11_clk_init();
break;
{
.soc_id = SOC_UNIPHIER_LD11,
.nand_2cs = false,
.sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld11_pll_init,
.clk_init = uniphier_ld11_clk_init,
.misc_init = uniphier_ld11_misc_init,
},
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD20)
case SOC_UNIPHIER_LD20:
/* ES1 errata: increase VDD09 supply to suppress VBO noise */
if (uniphier_get_soc_revision() == 1) {
writel(0x00000003, 0x6184e004);
writel(0x00000100, 0x6184e040);
writel(0x0000b500, 0x6184e024);
writel(0x00000001, 0x6184e000);
}
uniphier_nand_pin_init(false);
sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
sg_set_iectrl(149);
sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
sg_set_iectrl(153);
led_puts("U1");
uniphier_ld20_pll_init(bd);
uniphier_ld20_clk_init();
cci500_init(2);
break;
{
.soc_id = SOC_UNIPHIER_LD20,
.nand_2cs = false,
.sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld20_pll_init,
.misc_init = uniphier_ld20_misc_init,
},
#endif
default:
break;
};
static struct uniphier_initdata *uniphier_get_initdata(
enum uniphier_soc_id soc_id)
{
int i;
for (i = 0; i < ARRAY_SIZE(uniphier_initdata); i++) {
if (uniphier_initdata[i].soc_id == soc_id)
return &uniphier_initdata[i];
}
uniphier_setup_xirq();
return NULL;
}
int board_init(void)
{
struct uniphier_initdata *initdata;
enum uniphier_soc_id soc_id;
int ret;
led_puts("U0");
soc_id = uniphier_get_soc_type();
initdata = uniphier_get_initdata(soc_id);
if (!initdata) {
pr_err("unsupported board\n");
return -EINVAL;
}
initdata->sbc_init();
support_card_init();
led_puts("U0");
if (IS_ENABLED(CONFIG_NAND_DENALI)) {
ret = uniphier_pin_init(initdata->nand_2cs ?
"nand2cs_grp" : "nand_grp");
if (ret)
pr_err("failed to init NAND pins\n");
}
led_puts("U1");
if (initdata->pll_init)
initdata->pll_init();
led_puts("U2");
support_card_late_init();
if (initdata->clk_init)
initdata->clk_init();
led_puts("U3");
if (initdata->misc_init)
initdata->misc_init();
led_puts("U4");
uniphier_setup_xirq();
led_puts("U5");
support_card_late_init();
led_puts("U6");
#ifdef CONFIG_ARM64
uniphier_smp_kick_all_cpus();
#endif
......
......@@ -4,15 +4,15 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-clk-ld4.o dpll-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += early-clk-ld4.o dpll-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += early-clk-ld4.o dpll-pro4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += early-clk-ld4.o dpll-sld8.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += early-clk-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += early-clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += early-clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += early-clk-ld11.o dpll-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-clk-ld20.o dpll-ld20.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += clk-early-sld3.o clk-dram-sld3.o dpll-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-early-sld3.o clk-dram-sld3.o dpll-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-early-sld3.o clk-dram-sld3.o dpll-pro4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-early-sld3.o clk-dram-sld3.o dpll-sld8.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-early-sld3.o clk-dram-pro5.o dpll-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-early-sld3.o clk-dram-pxs2.o dpll-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-sld3.o clk-dram-pxs2.o dpll-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-early-ld11.o clk-dram-ld11.o dpll-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-early-ld11.o clk-dram-ld20.o dpll-ld20.o
else
......@@ -24,7 +24,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o pll-ld20.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-ld20.o
endif
......
/*
* Copyright (C) 2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
......@@ -10,7 +9,7 @@
#include "../init.h"
#include "../sc64-regs.h"
int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_ld11_dram_clk_init(void)
{
u32 tmp;
......@@ -20,13 +19,7 @@ int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd)
writel(tmp, SC_RSTCTRL7);
/* provide clocks */
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_PERI;
writel(tmp, SC_CLKCTRL4);
tmp = readl(SC_CLKCTRL7);
tmp |= SC_CLKCTRL7_UMC31 | SC_CLKCTRL7_UMC30;
writel(tmp, SC_CLKCTRL7);
return 0;
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
......@@ -9,7 +9,7 @@
#include "../init.h"
#include "../sc64-regs.h"
int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_ld20_dram_clk_init(void)
{
u32 tmp;
......@@ -21,14 +21,8 @@ int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd)
writel(tmp, SC_RSTCTRL7);
/* provide clocks */
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_PERI;
writel(tmp, SC_CLKCTRL4);
tmp = readl(SC_CLKCTRL7);
tmp |= SC_CLKCTRL7_UMCSB | SC_CLKCTRL7_UMC32 | SC_CLKCTRL7_UMC31 |
SC_CLKCTRL7_UMC30;
writel(tmp, SC_CLKCTRL7);
return 0;
}
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.m@jp.panasonic.com>
* Copyright (C) 2015-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
......@@ -9,7 +9,7 @@
#include "../init.h"
#include "../sc-regs.h"
int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_pro5_dram_clk_init(void)
{
u32 tmp;
......@@ -24,17 +24,12 @@ int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd)
SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 |
SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30;
writel(tmp, SC_RSTCTRL4);
readl(SC_RSTCTRL); /* dummy read */
readl(SC_RSTCTRL4); /* dummy read */
/* provide clocks */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC1 |
SC_CLKCTRL4_CEN_UMC0;
writel(tmp, SC_CLKCTRL4);
readl(SC_CLKCTRL4); /* dummy read */
return 0;
}
/*
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
......@@ -11,17 +11,11 @@
#include "../init.h"
#include "../sc-regs.h"
int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_pxs2_dram_clk_init(void)
{
u32 tmp;
/* deassert reset */
if (spl_boot_device() != BOOT_DEVICE_NAND) {
tmp = readl(SC_RSTCTRL);
tmp &= ~SC_RSTCTRL_NRST_NAND;
writel(tmp, SC_RSTCTRL);
};
tmp = readl(SC_RSTCTRL4);
tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 |
SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 |
......@@ -31,15 +25,9 @@ int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd)
readl(SC_RSTCTRL4); /* dummy read */
/* provide clocks */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 |
SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0;
writel(tmp, SC_CLKCTRL4);
readl(SC_CLKCTRL4); /* dummy read */
return 0;
}
/*
* Copyright (C) 2011-2015 Masahiro Yamada <yamada.m@jp.panasonic.com>
* Copyright (C) 2011-2014 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
......@@ -11,24 +12,19 @@
#include "../init.h"
#include "../sc-regs.h"
int uniphier_ld4_early_clk_init(const struct uniphier_board_data *bd)
void uniphier_sld3_dram_clk_init(void)
{
u32 tmp;
/* deassert reset */
tmp = readl(SC_RSTCTRL);
tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0;
if (spl_boot_device() != BOOT_DEVICE_NAND)
tmp &= ~SC_RSTCTRL_NRST_NAND;
writel(tmp, SC_RSTCTRL);
readl(SC_RSTCTRL); /* dummy read */
/* provide clocks */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_UMC | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
tmp |= SC_CLKCTRL_CEN_UMC;
writel(tmp, SC_CLKCTRL);
readl(SC_CLKCTRL); /* dummy read */
return 0;
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
* Copyright (C) 2016-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
......@@ -9,6 +9,12 @@
#include "../init.h"
#include "../sc64-regs.h"
void uniphier_ld20_clk_init(void)
void uniphier_ld11_early_clk_init(void)
{
u32 tmp;
/* provide clocks */
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_PERI;
writel(tmp, SC_CLKCTRL4);
}
/*
* Copyright (C) 2011-2014 Panasonic Corporation
* Copyright (C) 2015-2017 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include <linux/io.h>
#include "../init.h"
#include "../sc-regs.h"
void uniphier_sld3_early_clk_init(void)
{
u32 tmp;
/* deassert reset */
if (spl_boot_device() != BOOT_DEVICE_NAND) {
tmp = readl(SC_RSTCTRL);
tmp &= ~SC_RSTCTRL_NRST_NAND;
writel(tmp, SC_RSTCTRL);
};
/* provide clocks */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
readl(SC_CLKCTRL); /* dummy read */
}
#include "../init.h"
int uniphier_pro5_dpll_init(const struct uniphier_board_data *bd)
{
return 0;
}
#include "../init.h"
int uniphier_pxs2_dpll_init(const struct uniphier_board_data *bd)
{
return 0;
}
......@@ -11,7 +11,7 @@
#include "../sc64-regs.h"
#include "pll.h"
int uniphier_ld20_pll_init(const struct uniphier_board_data *bd)
void uniphier_ld20_pll_init(void)
{
uniphier_ld20_sscpll_init(SC_CPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 4);
/* do nothing for SPLL */
......@@ -36,6 +36,4 @@ int uniphier_ld20_pll_init(const struct uniphier_board_data *bd)
uniphier_ld20_dspll_init(SC_VPLL8KCTRL);
uniphier_ld20_dspll_init(SC_A2PLLCTRL);
return 0;
}
......@@ -4,12 +4,14 @@
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += umc-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += umc-ld4.o \
ddrphy-training.o ddrphy-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += umc-pro4.o \
ddrphy-training.o ddrphy-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += umc-sld8.o \
ddrphy-training.o ddrphy-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += umc-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += umc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += umc-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += umc-ld11.o
......
/*
* Copyright (C) 2016 Socionext Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "../init.h"
int uniphier_pro5_umc_init(const struct uniphier_board_data *bd)
{
return 0;
}
#include "../init.h"
int uniphier_sld3_umc_init(const struct uniphier_board_data *bd)
{
return 0;
}
......@@ -46,57 +46,63 @@ int uniphier_ld11_init(const struct uniphier_board_data *bd);
int uniphier_ld20_init(const struct uniphier_board_data *bd);
#if defined(CONFIG_MICRO_SUPPORT_CARD)
int uniphier_sbc_init_admulti(const struct uniphier_board_data *bd);
int uniphier_sbc_init_savepin(const struct uniphier_board_data *bd);
int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd);
int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd);
void uniphier_sbc_init_admulti(void);
void uniphier_sbc_init_savepin