Commit c53043b7 authored by Wolfgang Denk's avatar Wolfgang Denk

MPC7xx: remove obsolete "BAB7xx" board

The BAB7xx boards are almost deceased.  They cause build warnings, an
it's not worth the effort to fix these.  Remove the dead body.
Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
parent 01baa056
......@@ -161,7 +161,7 @@ D: Support for WRS SBC8347/8349 boards
N: Frank Gottschling
E: fgottschling@eltec.de
D: Support for ELTEC MHPC/BAB7xx/ELPPC boards, cfb-console, i8042, SMI LynxEM
D: Support for ELTEC MHPC/ELPPC boards, cfb-console, i8042, SMI LynxEM
W: www.eltec.de
N: Marius Groeger
......@@ -183,7 +183,7 @@ D: Port to Walnut405 board
N: Andreas Heppel
E: aheppel@sysgo.de
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
D: CPU Support for MPC 75x
N: Josh Huber
E: huber@alum.wpi.edu
......
......@@ -214,8 +214,6 @@ Frank Gottschling <fgottschling@eltec.de>
MHPC MPC8xx
BAB7xx MPC740/MPC750
Wolfgang Grandegger <wg@denx.de>
ipek01 MPC5200
......
......@@ -564,7 +564,7 @@ The following options need to be configured:
CONFIG_CFB_CONSOLE
Enables console device for a color framebuffer. Needs following
defines (cf. smiLynxEM, i8042, board/eltec/bab7xx)
defines (cf. smiLynxEM, i8042)
VIDEO_FB_LITTLE_ENDIAN graphic memory organisation
(default big endian)
VIDEO_HW_RECTFILL graphic chip supports
......
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS = $(BOARD).o flash.o pci.o misc.o el_srom.o dc_srom.o l2cache.o
SOBJS = asm_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
This diff is collapsed.
/*
* (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Andreas Heppel <aheppel@sysgo.de>
* (C) Copyright 2001 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <mpc106.h>
#include <mk48t59.h>
#include <74xx_7xx.h>
#include <ns87308.h>
#include <video_fb.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
/*---------------------------------------------------------------------------*/
/*
* Get Bus clock frequency
*/
ulong bab7xx_get_bus_freq (void)
{
/*
* The GPIO Port 1 on BAB7xx reflects the bus speed.
*/
volatile struct GPIO *gpio =
(struct GPIO *) (CONFIG_SYS_ISA_IO + CONFIG_SYS_NS87308_GPIO_BASE);
unsigned char data = gpio->dta1;
if (data & 0x02)
return 66666666;
return 83333333;
}
/*---------------------------------------------------------------------------*/
/*
* Measure CPU clock speed (core clock GCLK1) (Approx. GCLK frequency in Hz)
*/
ulong bab7xx_get_gclk_freq (void)
{
static const int pllratio_to_factor[] = {
00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35,
00,
};
return pllratio_to_factor[get_hid1 () >> 28] *
(bab7xx_get_bus_freq () / 10);
}
/*----------------------------------------------------------------------------*/
int checkcpu (void)
{
uint pvr = get_pvr ();
printf ("MPC7xx V%d.%d", (pvr >> 8) & 0xFF, pvr & 0xFF);
printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq () / 1000000,
bab7xx_get_bus_freq () / 1000000);
return (0);
}
/* ------------------------------------------------------------------------- */
int checkboard (void)
{
#ifdef CONFIG_SYS_ADDRESS_MAP_A
puts ("Board: ELTEC BAB7xx PReP\n");
#else
puts ("Board: ELTEC BAB7xx CHRP\n");
#endif
return (0);
}
/* ------------------------------------------------------------------------- */
int checkflash (void)
{
/* TODO: XXX XXX XXX */
printf ("2 MB ## Test not implemented yet ##\n");
return (0);
}
/* ------------------------------------------------------------------------- */
static unsigned int mpc106_read_cfg_dword (unsigned int reg)
{
unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
out32r (MPC106_REG_ADDR, reg_addr);
return (in32r (MPC106_REG_DATA | (reg & 0x3)));
}
/* ------------------------------------------------------------------------- */
long int dram_size (int board_type)
{
/* No actual initialisation to do - done when setting up
* PICRs MCCRs ME/SARs etc in ram_init.S.
*/
register unsigned long i, msar1, mear1, memSize;
#if defined(CONFIG_SYS_MEMTEST)
register unsigned long reg;
printf ("Testing DRAM\n");
/* write each mem addr with it's address */
for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4)
*reg = reg;
for (reg = CONFIG_SYS_MEMTEST_START; reg < CONFIG_SYS_MEMTEST_END; reg += 4) {
if (*reg != reg)
return -1;
}
#endif
/*
* Since MPC106 memory controller chip has already been set to
* control all memory, just read and interpret its memory boundery register.
*/
memSize = 0;
msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
do {
if (i & 0x01) /* is bank enabled ? */
memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
msar1 >>= 8;
mear1 >>= 8;
i >>= 1;
} while (i);
return (memSize * 0x100000);
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
return dram_size (board_type);
}
/* ------------------------------------------------------------------------- */
void after_reloc (ulong dest_addr)
{
/*
* Jump to the main U-Boot board init code
*/
board_init_r ((gd_t *) gd, dest_addr);
}
/* ------------------------------------------------------------------------- */
/*
* do_reset is done here because in this case it is board specific, since the
* 7xx CPUs can only be reset by external HW (the RTC in this case).
*/
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#if defined(CONFIG_RTC_MK48T59)
/* trigger watchdog immediately */
rtc_set_watchdog (1, RTC_WD_RB_16TH);
#else
#error "You must define the macro CONFIG_RTC_MK48T59."
#endif
return 0;
}
/* ------------------------------------------------------------------------- */
#if defined(CONFIG_WATCHDOG)
/*
* Since the 7xx CPUs don't have an internal watchdog, this function is
* board specific. We use the RTC here.
*/
void watchdog_reset (void)
{
#if defined(CONFIG_RTC_MK48T59)
/* we use a 32 sec watchdog timer */
rtc_set_watchdog (8, RTC_WD_RB_4);
#else
#error "You must define the macro CONFIG_RTC_MK48T59."
#endif
}
#endif /* CONFIG_WATCHDOG */
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CONSOLE_EXTRA_INFO
extern GraphicDevice smi;
void video_get_info_str (int line_number, char *info)
{
/* init video info strings for graphic console */
switch (line_number) {
case 1:
sprintf (info, " MPC7xx V%d.%d at %ld / %ld MHz",
(get_pvr () >> 8) & 0xFF,
get_pvr () & 0xFF,
bab7xx_get_gclk_freq () / 1000000,
bab7xx_get_bus_freq () / 1000000);
return;
case 2:
sprintf (info,
" ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH",
dram_size (0) / 0x100000, flash_init () / 0x100000);
return;
case 3:
sprintf (info, " %s", smi.modeIdent);
return;
}
/* no more info lines */
*info = 0;
return;
}
#endif
/*---------------------------------------------------------------------------*/
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
/*
* (C) Copyright 2002 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* SRom I/O routines.
*/
#include <common.h>
#include <pci.h>
#include "srom.h"
#define SROM_RD 0x00004000 /* Read from Boot ROM */
#define SROM_WR 0x00002000 /* Write to Boot ROM */
#define SROM_SR 0x00000800 /* Select Serial ROM when set */
#define DT_IN 0x00000004 /* Serial Data In */
#define DT_CLK 0x00000002 /* Serial ROM Clock */
#define DT_CS 0x00000001 /* Serial ROM Chip Select */
static u_int dc_srom_iobase;
/*----------------------------------------------------------------------------*/
static int inl(u_long addr)
{
return le32_to_cpu(*(volatile u_long *)(addr));
}
/*----------------------------------------------------------------------------*/
static void outl (int command, u_long addr)
{
*(volatile u_long *)(addr) = cpu_to_le32(command);
}
/*----------------------------------------------------------------------------*/
static void sendto_srom(u_int command, u_long addr)
{
outl(command, addr);
udelay(1);
return;
}
/*----------------------------------------------------------------------------*/
static int getfrom_srom(u_long addr)
{
s32 tmp;
tmp = inl(addr);
udelay(1);
return tmp;
}
/*----------------------------------------------------------------------------*/
static void srom_latch (u_int command, u_long addr)
{
sendto_srom (command, addr);
sendto_srom (command | DT_CLK, addr);
sendto_srom (command, addr);
return;
}
/*----------------------------------------------------------------------------*/
static void srom_command_rd (u_int command, u_long addr)
{
srom_latch (command, addr);
srom_latch (command, addr);
srom_latch ((command & 0x0000ff00) | DT_CS, addr);
return;
}
/*----------------------------------------------------------------------------*/
static void srom_command_wr (u_int command, u_long addr)
{
srom_latch (command, addr);
srom_latch ((command & 0x0000ff00) | DT_CS, addr);
srom_latch (command, addr);
return;
}
/*----------------------------------------------------------------------------*/
static void srom_address(u_int command, u_long addr, u_char offset)
{
int i;
signed char a;
a = (char)(offset << 2);
for (i=0; i<6; i++, a <<= 1)
{
srom_latch(command | ((a < 0) ? DT_IN : 0), addr);
}
udelay(1);
i = (getfrom_srom(addr) >> 3) & 0x01;
return;
}
/*----------------------------------------------------------------------------*/
static short srom_data_rd (u_int command, u_long addr)
{
int i;
short word = 0;
s32 tmp;
for (i=0; i<16; i++)
{
sendto_srom(command | DT_CLK, addr);
tmp = getfrom_srom(addr);
sendto_srom(command, addr);
word = (word << 1) | ((tmp >> 3) & 0x01);
}
sendto_srom(command & 0x0000ff00, addr);
return word;
}
/*----------------------------------------------------------------------------*/
static int srom_data_wr (u_int command, u_long addr, short val)
{
int i;
u_long longVal;
s32 tmp;
longVal = (u_long)(le16_to_cpu(val));
for (i=0; i<16; i++)
{
tmp = (longVal & 0x8000)>>13;
sendto_srom (tmp | command, addr);
sendto_srom (tmp | command | DT_CLK, addr);
sendto_srom (tmp | command, addr);
longVal = longVal<<1;
}
sendto_srom(command & 0x0000ff00, addr);
sendto_srom(command, addr);
tmp = 100;
do
{
if ((getfrom_srom(dc_srom_iobase) & 0x8) == 0x8)
break;
udelay(1000);
} while (--tmp);
if (tmp == 0)
{
printf("Write DEC21143 SRom timed out !\n");
return (-1);
}
return 0;
}
/*----------------------------------------------------------------------------*/
static short srom_rd (u_long addr, u_char offset)
{
sendto_srom (SROM_RD | SROM_SR, addr);
srom_latch (SROM_RD | SROM_SR | DT_CS, addr);
srom_command_rd (SROM_RD | SROM_SR | DT_IN | DT_CS, addr);
srom_address (SROM_RD | SROM_SR | DT_CS, addr, offset);
return srom_data_rd (SROM_RD | SROM_SR | DT_CS, addr);
}
/*----------------------------------------------------------------------------*/
static void srom_wr_enable (u_long addr)
{
int i;
sendto_srom (SROM_WR | SROM_SR, addr);
srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
for (i=0; i<6; i++)
{
srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
}
}
/*----------------------------------------------------------------------------*/
static int srom_wr (u_long addr, u_char offset, short val)
{
srom_wr_enable (addr);
sendto_srom (SROM_WR | SROM_SR, addr);
srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
srom_command_wr (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
srom_address (SROM_WR | SROM_SR | DT_CS, addr, offset);
return srom_data_wr (SROM_WR | SROM_SR | DT_CS, addr, val);
}
/*----------------------------------------------------------------------------*/
/*
* load data from the srom
*/
int dc_srom_load (u_short *dest)
{
int offset;
short tmp;
/* get srom iobase from local network controller */
pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
dc_srom_iobase = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
dc_srom_iobase += 0x48; /* io offset for srom access */
memset (dest, 0, 128);
for (offset=0; offset<64; offset++)
{
tmp = srom_rd (dc_srom_iobase, offset);
*dest++ = le16_to_cpu(tmp);
}
return (0);
}
/*----------------------------------------------------------------------------*/
/*
* store data into the srom
*/
int dc_srom_store (u_short *src)
{
int offset;
/* get srom iobase from local network controller */
pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
dc_srom_iobase = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
dc_srom_iobase += 0x48; /* io offset for srom access */
for (offset=0; offset<64; offset++)
{
if (srom_wr (dc_srom_iobase, offset, *src) == -1)
return (-1);
src++;
}
return (0);
}
/*----------------------------------------------------------------------------*/
/*
* (C) Copyright 2002 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include "srom.h"
/*----------------------------------------------------------------------------*/
/*
* START sequence
* _ _________
* SCLK _> \____
* _ ____
* SDIO _> \_________
* : : :
*/
static void eepStart (void)
{
out8(I2C_BUS_DAT, 0x60); /* SCLK = high SDIO = high */
out8(I2C_BUS_DIR, 0x60); /* set output direction for SCLK/SDIO */
udelay(10);
out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = low */
udelay(10);
out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = low */
udelay(10);
}
/*----------------------------------------------------------------------------*/
/*
* STOP sequence
* _______
* SCLK _____/
* _ ___
* SDIO _>_______/
* : : :
*/
static void eepStop (void)
{
out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = low */
out8(I2C_BUS_DIR, 0x60); /* set output direction for SCLK/SDIO */
udelay(10);
out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = low */
udelay(10);
out8(I2C_BUS_DAT, 0x60); /* SCLK = high SDIO = high */
udelay(10);
out8(I2C_BUS_DIR, 0x00); /* reset to input direction */
}
/*----------------------------------------------------------------------------*/
/*
* Read one byte from EEPROM
* ___ ___ ___ ___ ___ ___ ___ ___
* SCLK ___/ \___/ \___/ \___/ \___/ \___/ \___/ \___/ \
* _________________________________________________________________
* SDIO > ^ ^ ^ ^ ^ ^ ^ ^
* : : : : : : : : : : : : : : : : :
*/
static unsigned char eepReadByte (void)
{
register unsigned char buf = 0x00;
register int i;
out8(I2C_BUS_DIR, 0x40);
for (i = 0; i < 8; i++)
{
out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */
udelay(10);
out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = high */
udelay(15);
buf <<= 1;
buf = (in8(I2C_BUS_DAT) & 0x20) ? (buf | 0x01) : (buf & 0xFE);
out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */
udelay(10);
}
return(buf);
}
/*----------------------------------------------------------------------------*/
/*
* Write one byte to EEPROM
* ___ ___ ___ ___ ___ ___ ___ ___
* SCLK __/ \___/ \___/ \___/ \___/ \___/ \___/ \___/ \__
* _______ _______ _______ _______ _______ _______ _______ ________
* SDIO X_______X_______X_______X_______X_______X_______X_______X________
* : 7 : 6 : 5 : 4 : 3 : 2 : 1 : 0
*/
static void eepWriteByte (register unsigned char buf)
{
register int i;
(buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = data */
out8(I2C_BUS_DIR, 0x60);
for (i = 7; i >= 0; i--)
{
(buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low SDIO=data */