Commit c609719b authored by wdenk's avatar wdenk

Initial revision

parent 5b1d7137
#
# Parts of the development effort for this project have been
# sponsored by SIEMENS AG, Austria. Thanks to SIEMENS for
# supporting an Open Source project!
#
#
# This is at least a partial credits-file of individual people that
# have contributed to the U-Boot project. It is sorted by name and
# formatted to allow easy grepping and beautification by scripts.
# The fields are: name (N), email (E), web-address (W), PGP key ID
# and fingerprint (P), description (D), and snail-mail address (S).
# Thanks,
#
# Wolfgang Denk
#----------
N: Dr. Bruno Achauer
E: bruno@exet-ag.de
D: Support for NetBSD (both as host and target system)
N: Swen Anderson
E: sand@peppercon.de
D: ERIC Support
N: Guillaume Alexandre
E: guillaume.alexandre@gespac.ch
D: Add PCIPPC6 configuration
N: Pierre Aubert
E: <p.aubert@staubli.com>
D: Support for RPXClassic board
N: Andre Beaudin
E: <andre.beaudin@colubris.com>
D: PCMCIA, Ethernet, TFTP
N: Jerry van Baren
E: <vanbaren@cideas.com>
D: BedBug port to 603e core (MPC82xx). Code for enhanced memory test.
N: Raphael Bossek
E: raphael.bossek@solutions4linux.de
D: 8xxrom-0.3.0
N: David Brown
E: DBrown03@harris.com
D: Extensions to 8xxrom-0.3.0
N: Oliver Brown
E: obrown@adventnetworks.com
D: Port to the gw8260 board
N: Jonathan De Bruyne
E: jonathan.debruyne@siemens.atea.be
D: Port to Siemens IAD210 board
N: Conn Clark
E: clark@esteem.com
D: ESTEEM192E support
N: Magnus Damm
E: eramdam@kieray1.p.y.ki.era.ericsson.se
D: 8xxrom
N: Kri Davsson
E: kd@flaga.is
D: FLAGA DM Support
N: Wolfgang Denk
E: wd@denx.de
D: U-Boot initial version, continuing maintenance, ARMBoot merge
W: http://www.denx.de
N: Dan A. Dickey
E: ddickey@charter.net
D: FADS Support
N: James F. Dougherty
E: jfd@GigabitNetworks.COM
D: Port to the MOUSSE board
N: Dave Ellis
E: DGE@sixnetio.com
D: EEPROM Speedup, SXNI855T port
N: Dr. Wolfgang Grandegger
E: wg@denx.de
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
W: www.denx.de
N: Frank Gottschling
E: fgottschling@eltec.de
D: Support for ELTEC MHPC/BAB7xx/ELPPC boards, cfb-console, i8042, SMI LynxEM
W: www.eltec.de
N: Marius Groeger
E: mgroeger@sysgo.de
D: MBX Support, board specific function interface, EST SBC8260 support; initial support for StrongARM (LART), ARM720TDMI (implementa A7)
W: www.elinos.com
N: Kirk Haderlie
E: khaderlie@vividimage.com
D: Added TFTP to 8xxrom (-> 0.3.1)
N: Chris Hallinan
E: clh@net1plus.com
D: DHCP Support
N: Anne-Sophie Harnois
E: Anne-Sophie.Harnois@nextream.fr
D: Port to Walnut405 board
N: Andreas Heppel
E: aheppel@sysgo.de
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
N: Josh Huber
E: huber@alum.wpi.edu
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
W: http://www.mclx.com/
H: Stuart Hughes
E: stuarth@lineo.com
D: Port to MPC8260ADS board
H: Rich Ireland
E: r.ireland@computer.org
D: FPGA device configuration driver
N: Gary Jennejohn
E: garyj@jennejohn.org, gj@denx.de
D: Support for Samsung ARM920T S3C2400X, ARM920T "TRAB"
W: www.denx.de
N: Murray Jensen
E: Murray.Jensen@cmst.csiro.au
D: Initial 8260 support; GDB support
D: Port to Cogent+Hymod boards; Hymod Board Database
W: http://www.msa.cmst.csiro.au/ourstaff/MurrayJensen/mjj.html
N: Yoo. Jonghoon
E: yooth@ipone.co.kr
D: Added port to the RPXlite board
N: Brad Kemp
E: Brad.Kemp@seranoa.com
D: Port to Windriver ppmc8260 board
N: Thomas Koeller
E: tkoeller@gmx.net
D: Port to Motorola Sandpoint 3 (MPC8240)
N: Thomas Lange
E: thomas@corelatus.com
D: Support for GTH board; lots of PCMCIA fixes
N: Raymond Lo
E: lo@routefree.com
D: Support for DOS partitions
N: Dan Malek
E: dan@netx4.com
D: FADSROM, the grandfather of all of this
N: Jay Monkman
E: jtm@smoothsmoothie.com
D: EST SBC8260 support
N: Frank Morauf
E: frank.morauf@salzbrenner.com
D: Support for Embedded Planet RPX Super Board
N: David Mller
E: d.mueller@elsoft.ch
D: Support for Samsung ARM920T SMDK2410 eval board
N: Rolf Offermanns
E: rof@sysgo.de
D: Initial support for SSV-DNP1110, SMC91111 driver
W: www.elinos.com
N: Keith Outwater
E: Keith_Outwater@mvis.com
D: Support for GEN860T board
N: Keith Outwater
E: keith_outwater@mvis.com
D: Support for generic/custom MPC860T board (GEN860T)
N: Frank Panno
E: fpanno@delphintech.com
D: Support for Embedded Planet EP8260 Board
N: Denis Peter
E: d.peter@mpl.ch
D: Support for 4xx SCSI, floppy, CDROM, CT69000 video, ...
D: Support for PIP405 board
D: Support for MIP405 board
N: Bill Pitts
E: wlp@mindspring.com
D: BedBug embedded debugger code
N: Stefan Roese
E: stefan.roese@esd-electronics.com
D: IBM PPC401/403/405GP Support; Windows environment support
N: Neil Russell
E: caret@c-side.com
D: Author of LiMon-1.4.2, which contributed some ideas
N: Paolo Scaffardi
E: arsenio@tin.it
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
N: Robert Schwebel
E: r.schwebel@pengutronix.de
D: Support for csb226 board (xscale)
N: Rob Taylor
E: robt@flyingpig.com
D: Port to MBX860T and Sandpoint8240
N: Erik Theisen
E: etheisen@mindspring.com
D: MBX8xx and many other patches
N: Jim Thompson
E: jim@musenki.com
D: Support for MUSENKI board
N: David Updegraff
E: dave@cray.com
D: Port to Cray L1 board; DHCP vendor extensions
N: Christian Vejlbo
E: christian.vejlbo@tellabs.com
D: FADS860T ethernet support
N: Alex Zuepke
E: azu@sysgo.de
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
W: www.elinos.com
This diff is collapsed.
/*
* Simple serial driver for Cogent motherboard serial ports
* for use during boot
*/
#include <common.h>
#include <board/cogent/serial.h>
#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
(defined(CONFIG_8260) && defined(CONFIG_CONS_NONE))
#if CONFIG_CONS_INDEX == 1
#define CMA_MB_SERIAL_BASE CMA_MB_SERIALA_BASE
#elif CONFIG_CONS_INDEX == 2
#define CMA_MB_SERIAL_BASE CMA_MB_SERIALB_BASE
#elif CONFIG_CONS_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
#define CMA_MB_SERIAL_BASE CMA_MB_SER2A_BASE
#elif CONFIG_CONS_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
#define CMA_MB_SERIAL_BASE CMA_MB_SER2B_BASE
#else
#error CONFIG_CONS_INDEX must be configured for Cogent motherboard serial
#endif
int serial_init (void)
{
/* DECLARE_GLOBAL_DATA_PTR; */
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
serial_setbrg ();
cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
return (0);
}
void
serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
unsigned int divisor;
unsigned char lcr;
if ((divisor = br_to_div(gd->baudrate)) == 0)
divisor = DEFDIV;
lcr = cma_mb_reg_read(&mbsp->ser_lcr);
cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/
cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
cma_mb_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */
}
void
serial_putc(const char c)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
if (c == '\n')
serial_putc('\r');
while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
;
cma_mb_reg_write(&mbsp->ser_thr, c);
}
void
serial_puts(const char *s)
{
while (*s != '\0')
serial_putc(*s++);
}
int
serial_getc(void)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
;
return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
}
int
serial_tstc(void)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0);
}
#endif /* CONS_NONE */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) && \
defined(CONFIG_KGDB_NONE)
#if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX
#error Console and kgdb are on the same serial port - this is not supported
#endif
#if CONFIG_KGDB_INDEX == 1
#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALA_BASE
#elif CONFIG_KGDB_INDEX == 2
#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALB_BASE
#elif CONFIG_KGDB_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2A_BASE
#elif CONFIG_KGDB_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2B_BASE
#else
#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
#endif
void
kgdb_serial_init(void)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
unsigned int divisor;
if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0)
divisor = DEFDIV;
cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
cma_mb_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/
cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
printf("[on cma10x serial port B] ");
}
void
putDebugChar(int c)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
;
cma_mb_reg_write(&mbsp->ser_thr, c & 0xff);
}
void
putDebugStr(const char *str)
{
while (*str != '\0') {
if (*str == '\n')
putDebugChar('\r');
putDebugChar(*str++);
}
}
int
getDebugChar(void)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
;
return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
}
void
kgdb_interruptible(int yes)
{
cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
if (yes == 1) {
printf("kgdb: turning serial ints on\n");
cma_mb_reg_write(&mbsp->ser_ier, 0xf);
}
else {
printf("kgdb: turning serial ints off\n");
cma_mb_reg_write(&mbsp->ser_ier, 0x0);
}
}
#endif /* KGDB && KGDB_NONE */
#endif /* CAPS & SERPAR */
/*
* (C) Copyright 2001
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
*
* (C) Copyright 2001, 2002
* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc824x.h>
#include <asm/processor.h>
#include <pci.h>
#define BOARD_REV_REG 0xFE80002B
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char revision = *(volatile char *)(BOARD_REV_REG);
char buf[32];
puts ("Board: CU824 ");
printf("Revision %d ", revision);
printf("Local Bus at %s MHz\n", strmhz(buf, gd->bus_clk));
return 0;
}
long int initdram(int board_type)
{
int i, cnt;
volatile uchar * base = CFG_SDRAM_BASE;
volatile ulong * addr;
ulong save[32];
ulong val, ret = 0;
for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
addr = (volatile ulong *)base + cnt;
save[i++] = *addr;
*addr = ~cnt;
}
addr = (volatile ulong *)base;
save[i] = *addr;
*addr = 0;
if (*addr != 0) {
*addr = save[i];
goto Done;
}
for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
addr = (volatile ulong *)base + cnt;
val = *addr;
*addr = save[--i];
if (val != ~cnt) {
ulong new_bank0_end = cnt * sizeof(long) - 1;
ulong mear1 = mpc824x_mpc107_getreg(MEAR1);
ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
mear1 = (mear1 & 0xFFFFFF00) |
((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
emear1 = (emear1 & 0xFFFFFF00) |
((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
mpc824x_mpc107_setreg(MEAR1, mear1);
mpc824x_mpc107_setreg(EMEAR1, emear1);
ret = cnt * sizeof(long);
goto Done;
}
}
ret = CFG_MAX_RAM_SIZE;
Done:
return ret;
}
/*
* Initialize PCI Devices, report devices found.
*/
#ifndef CONFIG_PCI_PNP
static struct pci_config_table pci_sandpoint_config_table[] = {
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_BUS(CFG_ETH_DEV_FN), PCI_DEV(CFG_ETH_DEV_FN), PCI_FUNC(CFG_ETH_DEV_FN),
pci_cfgfunc_config_device, { CFG_ETH_IOBASE,
0,
PCI_COMMAND_IO | PCI_COMMAND_MASTER }},
{ }
};
#endif
struct pci_controller hose = {
#ifndef CONFIG_PCI_PNP
config_table: pci_sandpoint_config_table,
#endif
};
void pci_init(void)
{
pci_mpc824x_init(&hose);
}
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/sa1100/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
armboot_end_data = .;
. = ALIGN(4);
.bss : { *(.bss) }
armboot_end = .;
}
This diff is collapsed.
/*
* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <ppc_asm.tmpl>
#include <config.h>
/* General */
#define TLB_VALID 0x00000200
/* Supported page sizes */
#define SZ_1K 0x00000000
#define SZ_4K 0x00000010
#define SZ_16K 0x00000020
#define SZ_64K 0x00000030
#define SZ_256K 0x00000040
#define SZ_1M 0x00000050
#define SZ_16M 0x00000070
#define SZ_256M 0x00000090
/* Storage attributes */
#define SA_W 0x00000800 /* Write-through */
#define SA_I 0x00000400 /* Caching inhibited */
#define SA_M 0x00000200 /* Memory coherence */
#define SA_G 0x00000100 /* Guarded */
#define SA_E 0x00000080 /* Endian */
/* Access control */
#define AC_X 0x00000024 /* Execute */
#define AC_W 0x00000012 /* Write */
#define AC_R 0x00000009 /* Read */
/* Some handy macros */
#define EPN(e) ((e) & 0xfffffc00)
#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
#define TLB2(a) ( (a)&0x00000fbf )
#define tlbtab_start\
mflr r1 ;\
bl 0f ;
#define tlbtab_end\
.long 0, 0, 0 ; \
0: mflr r0 ; \
mtlr r1 ; \
blr ;
#define tlbentry(epn,sz,rpn,erpn,attr)\
.long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
/**************************************************************************
* TLB TABLE
*