Commit ca9b0a95 authored by Han Xu's avatar Han Xu

MLK-18240 imx8qxb0: change the i.MX8QXPB0 NAND iomux settings

Set the corrrect NAND IOMXU for i.MX8QXPB0.
Signed-off-by: 's avatarHan Xu <han.xu@nxp.com>
parent 17da16b6
......@@ -369,8 +369,8 @@ static iomux_cfg_t gpmi_nand_pads[] = {
SC_P_USDHC1_DATA0 | MUX_MODE_ALT(1) | MUX_PAD_CTRL(GPMI_NAND_PAD_CTRL),
/* i.MX8QXP NAND use nand_re_dqs_pins */
SC_P_EMMC0_CMD | MUX_MODE_ALT(1) | MUX_PAD_CTRL(GPMI_NAND_PAD_CTRL),
SC_P_USDHC1_DATA1 | MUX_MODE_ALT(1) | MUX_PAD_CTRL(GPMI_NAND_PAD_CTRL),
SC_P_USDHC1_CD_B | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPMI_NAND_PAD_CTRL),
SC_P_USDHC1_VSELECT | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPMI_NAND_PAD_CTRL),
};
......
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