Commit cb04db15 authored by Tom Rini's avatar Tom Rini

include/configs: Whitespace fixup

A number of moveconfig.py runs have left a instances of multiple empty
lines in a row.  Correct this to a single empty line.
Signed-off-by: 's avatarTom Rini <trini@konsulko.com>
parent 78d1e1d0
......@@ -712,7 +712,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0x7 /*SLOT 1*/
#define CONFIG_SYS_FM1_10GEC2_PHY_ADDR 0x6 /*SLOT 2*/
#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c
#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d
#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e
......
......@@ -52,7 +52,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
......
......@@ -93,7 +93,6 @@
#define CONFIG_CMD_PCI
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
......@@ -223,7 +222,6 @@ combinations. this should be removed later
#define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_800
#endif
/* relocated CCSRBAR */
#define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT
......@@ -590,7 +588,6 @@ combinations. this should be removed later
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
/*
* For booting Linux, the board info and command line data
* have to be in the first 64 MB of memory, since this is
......
......@@ -100,7 +100,6 @@
#define CONFIG_CMD_PCI
/*
* PCI Windows
* Memory space is mapped 1-1, but I/O space must start from 0.
......
......@@ -48,7 +48,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -57,7 +56,6 @@
#define CONFIG_CMD_BSP
#define CONFIG_CMD_EEPROM
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
......@@ -67,7 +65,6 @@
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
......@@ -102,7 +99,6 @@
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
......
......@@ -62,7 +62,6 @@
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
/*
* Command line configuration.
*/
......@@ -89,7 +88,6 @@
*/
#undef CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
......
......@@ -40,7 +40,6 @@
#define CONFIG_CMD_PCI
#define CONFIG_CMD_REGINFO
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
# define CONFIG_MII 1
......
......@@ -37,7 +37,6 @@
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text)
/*
* BOOTP options
*/
......
......@@ -58,7 +58,6 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_MII
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
#define CONFIG_MII 1
......
......@@ -21,7 +21,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
/***********************************************************
* Note that it may also be a MIP405T board which is a subset of the
* MIP405
......@@ -37,7 +36,6 @@
***********************************************************/
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
/*
* BOOTP options
*/
......@@ -46,7 +44,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -66,7 +63,6 @@
#if !defined(CONFIG_MIP405T)
#endif
/**************************************************************
* I2C Stuff:
* the MIP405 is equiped with an Atmel 24C128/256 EEPROM at address
......@@ -89,7 +85,6 @@
/* last 6 bits of the address */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
#define CONFIG_ENV_OFFSET 0x00000 /* environment starts at the beginning of the EEPROM */
#define CONFIG_ENV_SIZE 0x00800 /* 2k bytes may be used for env vars */
......@@ -280,7 +275,6 @@
#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000
#define CONFIG_PORT_ADDR PER_PLD_ADDR + 5
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in On Chip SRAM)
*/
......@@ -406,5 +400,4 @@
#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, PCI_BOOT Version"
#endif
#endif /* __CONFIG_H */
......@@ -276,7 +276,6 @@
#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
#define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024)
#define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE \
| BR_DECC_CHK_GEN /* Use HW ECC */ \
| BR_PS_8 /* 8 bit port */ \
......@@ -427,7 +426,6 @@
#define TSEC2_PHYIDX 0
#endif
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC1"
......@@ -474,7 +472,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......
......@@ -635,7 +635,6 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */
......@@ -337,7 +337,6 @@
#define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000
#define CONFIG_SYS_PCI_SLV_MEM_SIZE 0x80000000
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
......@@ -407,7 +406,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -602,7 +600,6 @@
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */
......@@ -464,7 +464,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
......@@ -473,7 +472,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -617,7 +615,6 @@
HID0_ENABLE_M_BIT |\
HID0_ENABLE_ADDRESS_BROADCAST) */
#define CONFIG_SYS_HID2 HID2_HBE
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
......
......@@ -484,7 +484,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -710,7 +709,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
/*
* Environment Configuration
*/
......
......@@ -475,7 +475,6 @@ extern int board_pci_host_broken(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -695,7 +694,6 @@ extern int board_pci_host_broken(void);
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */
......@@ -486,7 +486,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......
......@@ -156,7 +156,6 @@
#undef CONFIG_CLOCKS_IN_MHZ
/*
* Memory map -- xxx -this is wrong, needs updating
*
......
......@@ -65,7 +65,6 @@
#define CONFIG_SYS_CLK_FREQ 33000000
#endif
/*
* These can be toggled for performance analysis, otherwise use default.
*/
......@@ -136,7 +135,6 @@
#undef CONFIG_CLOCKS_IN_MHZ
/*
* Local Bus Definitions
*/
......@@ -201,7 +199,6 @@
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
/*
* 32KB, 8-bit wide for ADS config reg
*/
......@@ -278,7 +275,6 @@
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
......@@ -293,7 +289,6 @@
#define TSEC1_FLAGS TSEC_GIGABIT
#define TSEC2_FLAGS TSEC_GIGABIT
#if CONFIG_HAS_FEC
#define CONFIG_MPC85XX_FEC 1
#define CONFIG_MPC85XX_FEC_NAME "FEC"
......@@ -307,7 +302,6 @@
#endif /* CONFIG_TSEC_ENET */
/*
* Environment
*/
......@@ -326,7 +320,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
......@@ -335,7 +328,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -377,7 +369,6 @@
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif
/*
* Environment Configuration
*/
......
......@@ -133,7 +133,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
/*
* SDRAM on the Local Bus
*/
......@@ -314,7 +313,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
......@@ -353,7 +351,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -365,7 +362,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
......
......@@ -179,12 +179,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER)
#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER)
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
......@@ -317,7 +315,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
......@@ -368,7 +365,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......
......@@ -132,7 +132,6 @@ extern unsigned long get_clock_freq(void);
*
*/
/*
* Local Bus Definitions
*/
......@@ -421,7 +420,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
......@@ -479,7 +477,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -491,7 +488,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
......@@ -580,7 +576,6 @@ extern unsigned long get_clock_freq(void);
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
......
......@@ -33,7 +33,6 @@
#define CONFIG_FSL_VIA
#ifndef __ASSEMBLY__
extern unsigned long get_clock_freq(void);
#endif
......@@ -131,7 +130,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
/*
* SDRAM on the Local Bus
*/
......@@ -312,7 +310,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
......@@ -351,7 +348,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -363,7 +359,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
......
......@@ -60,7 +60,6 @@
#define CONFIG_SYS_CLK_FREQ 33000000
#endif
/*
* These can be toggled for performance analysis, otherwise use default.
*/
......@@ -133,7 +132,6 @@
#undef CONFIG_CLOCKS_IN_MHZ
/*
* Local Bus Definitions
*/
......@@ -198,7 +196,6 @@
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
/*
* 32KB, 8-bit wide for ADS config reg
*/
......@@ -273,7 +270,6 @@
#endif /* CONFIG_PCI */
#ifdef CONFIG_TSEC_ENET
#ifndef CONFIG_MII
......@@ -345,7 +341,6 @@
#endif
/*
* Environment
*/
......@@ -372,7 +367,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -419,7 +413,6 @@
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#endif
/*
* Environment Configuration
*/
......
......@@ -51,7 +51,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_ENABLE_36BIT_PHYS 1
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
......@@ -144,14 +143,12 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
/*
* SDRAM on the LocalBus
*/
#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */
#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
/*Chip select 2 - SDRAM*/
#define CONFIG_SYS_BR2_PRELIM 0xf0001861
#define CONFIG_SYS_OR2_PRELIM 0xfc006901
......@@ -364,7 +361,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
* BOOTP options
*/
......@@ -373,7 +369,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -385,7 +380,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
......@@ -459,14 +453,12 @@ extern unsigned long get_clock_freq(void);
"ramargs=setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs\0" \
#define CONFIG_NFSBOOTCOMMAND \
"run nfsargs;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
"run ramargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
......
......@@ -463,7 +463,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
......@@ -475,7 +474,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_CMD_PCI
#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_MMC 1
......
......@@ -177,7 +177,6 @@
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#endif
#define CONFIG_FLASH_BR_PRELIM \
(BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V)
#define CONFIG_FLASH_OR_PRELIM 0xf8000ff7
......@@ -318,7 +317,6 @@
#define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000)
#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
/* NAND flash config */
#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
| (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
......@@ -358,7 +356,6 @@
| BR_V) /* valid */
#define CONFIG_SYS_OR6_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
/* Serial Port - controlled on board with jumper J8
* open - index 2
* shorted - index 1
......@@ -509,7 +506,6 @@
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */
......
......@@ -20,7 +20,6 @@
#define CONFIG_SYS_TEXT_BASE 0xfff00000
/* video */
#define CONFIG_FSL_DIU_FB
......@@ -136,14 +135,12 @@
#endif
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1