Commit cc2244b8 authored by huang lin's avatar huang lin Committed by Simon Glass

rockchip: add timer driver

some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: default avatarLin Huang <hl@rock-chips.com>
Acked-by: default avatarSimon Glass <sjg@chromium.org>
parent abe919ec
/*
* (C) Copyright 2015 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_ARCH_TIMER_H
#define __ASM_ARCH_TIMER_H
struct rk_timer {
unsigned int timer_load_count0;
unsigned int timer_load_count1;
unsigned int timer_curr_value0;
unsigned int timer_curr_value1;
unsigned int timer_ctrl_reg;
unsigned int timer_int_status;
};
void rockchip_timer_init(void);
void rockchip_udelay(unsigned int usec);
#endif
......@@ -10,4 +10,5 @@ else
obj-y += board.o
endif
obj-y += common.o
obj-y += rk_timer.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
......@@ -18,6 +18,7 @@
#include <asm/arch/hardware.h>
#include <asm/arch/periph.h>
#include <asm/arch/sdram.h>
#include <asm/arch/timer.h>
#include <dm/pinctrl.h>
#include <dm/root.h>
#include <dm/test.h>
......@@ -110,24 +111,6 @@ static void configure_l2ctlr(void)
write_l2ctlr(l2ctlr);
}
struct rk3288_timer {
u32 timer_load_count0;
u32 timer_load_count1;
u32 timer_curr_value0;
u32 timer_curr_value1;
u32 timer_ctrl_reg;
u32 timer_int_status;
};
void init_timer(void)
{
struct rk3288_timer * const timer7_ptr = (void *)TIMER7_BASE;
writel(0xffffffff, &timer7_ptr->timer_load_count0);
writel(0xffffffff, &timer7_ptr->timer_load_count1);
writel(1, &timer7_ptr->timer_ctrl_reg);
}
static int configure_emmc(struct udevice *pinctrl)
{
struct gpio_desc desc;
......@@ -197,7 +180,7 @@ void board_init_f(ulong dummy)
hang();
}
init_timer();
rockchip_timer_init();
configure_l2ctlr();
ret = uclass_get_device(UCLASS_CLK, 0, &dev);
......
/*
* (C) Copyright 2015 Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/timer.h>
#include <asm/io.h>
#include <common.h>
#include <linux/types.h>
struct rk_timer * const timer_ptr = (void *)CONFIG_SYS_TIMER_BASE;
static uint64_t rockchip_get_ticks(void)
{
uint64_t timebase_h, timebase_l;
timebase_l = readl(&timer_ptr->timer_curr_value0);
timebase_h = readl(&timer_ptr->timer_curr_value1);
return timebase_h << 32 | timebase_l;
}
static uint64_t usec_to_tick(unsigned int usec)
{
uint64_t tick = usec;
tick *= CONFIG_SYS_TIMER_RATE / (1000 * 1000);
return tick;
}
void rockchip_udelay(unsigned int usec)
{
uint64_t tmp;
/* get timestamp */
tmp = rockchip_get_ticks() + usec_to_tick(usec);
/* loop till event */
while (rockchip_get_ticks() < tmp+1)
;
}
void rockchip_timer_init(void)
{
writel(0xffffffff, &timer_ptr->timer_load_count0);
writel(0xffffffff, &timer_ptr->timer_load_count1);
writel(1, &timer_ptr->timer_ctrl_reg);
}
......@@ -22,7 +22,8 @@
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
#define CONFIG_SYS_TIMER_COUNTER (TIMER7_BASE + 8)
#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
......
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