drivers/mtd/nand: Move conditional compilation to Makefile

rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY
Signed-off-by: default avatarJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
parent 4fb09b81
......@@ -23,7 +23,7 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND)
#if !defined(CFG_NAND_LEGACY)
#if !defined(CONFIG_NAND_LEGACY)
#include <nand.h>
#include <asm/arch/pxa-regs.h>
......
......@@ -27,7 +27,7 @@
#include <command.h>
#include <image.h>
#include <asm/byteorder.h>
#if defined(CFG_NAND_LEGACY)
#if defined(CONFIG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#endif
#include <fat.h>
......@@ -58,7 +58,7 @@ extern int flash_sect_erase(ulong, ulong);
extern int flash_sect_protect (int, ulong, ulong);
extern int flash_write (char *, ulong, ulong);
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
/* references to names in cmd_nand.c */
#define NANDRW_READ 0x01
#define NANDRW_WRITE 0x00
......@@ -158,7 +158,7 @@ int au_do_update(int i, long sz)
int off, rc;
uint nbytes;
int k;
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
int total;
#endif
......@@ -241,7 +241,7 @@ int au_do_update(int i, long sz)
debug ("flash_sect_erase(%lx, %lx);\n", start, end);
flash_sect_erase (start, end);
} else {
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
printf ("Updating NAND FLASH with image %s\n",
au_image[i].name);
debug ("nand_legacy_erase(%lx, %lx);\n", start, end);
......@@ -273,7 +273,7 @@ int au_do_update(int i, long sz)
rc = flash_write ((char *)addr, start,
(nbytes + 1) & ~1);
} else {
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
debug ("nand_legacy_rw(%p, %lx, %x)\n",
addr, start, nbytes);
rc = nand_legacy_rw (nand_dev_desc,
......@@ -298,7 +298,7 @@ int au_do_update(int i, long sz)
rc = crc32 (0, (uchar *)(start + off),
image_get_data_size (hdr));
} else {
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
rc = nand_legacy_rw (nand_dev_desc,
NANDRW_READ | NANDRW_JFFS2 |
NANDRW_JFFS2_SKIP,
......
......@@ -555,7 +555,7 @@ int board_early_init_f(void)
return 0;
}
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
......
......@@ -96,12 +96,12 @@
#include <cramfs/cramfs_fs.h>
#if defined(CONFIG_CMD_NAND)
#ifdef CFG_NAND_LEGACY
#ifdef CONFIG_NAND_LEGACY
#include <linux/mtd/nand_legacy.h>
#else /* !CFG_NAND_LEGACY */
#else /* !CONFIG_NAND_LEGACY */
#include <linux/mtd/nand.h>
#include <nand.h>
#endif /* !CFG_NAND_LEGACY */
#endif /* !CONFIG_NAND_LEGACY */
#endif
/* enable/disable debugging messages */
#define DEBUG_JFFS
......@@ -476,7 +476,7 @@ static int part_del(struct mtd_device *dev, struct part_info *part)
}
}
#ifdef CFG_NAND_LEGACY
#ifdef CONFIG_NAND_LEGACY
jffs2_free_cache(part);
#endif
list_del(&part->link);
......@@ -505,7 +505,7 @@ static void part_delall(struct list_head *head)
list_for_each_safe(entry, n, head) {
part_tmp = list_entry(entry, struct part_info, link);
#ifdef CFG_NAND_LEGACY
#ifdef CONFIG_NAND_LEGACY
jffs2_free_cache(part_tmp);
#endif
list_del(entry);
......@@ -741,7 +741,7 @@ static int device_validate(u8 type, u8 num, u32 *size)
} else if (type == MTD_DEV_TYPE_NAND) {
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
if (num < CFG_MAX_NAND_DEVICE) {
#ifndef CFG_NAND_LEGACY
#ifndef CONFIG_NAND_LEGACY
*size = nand_info[num].size;
#else
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
......
......@@ -11,7 +11,7 @@
#include <common.h>
#ifndef CFG_NAND_LEGACY
#ifndef CONFIG_NAND_LEGACY
/*
*
* New NAND support
......@@ -667,7 +667,7 @@ U_BOOT_CMD(nboot, 4, 1, do_nandboot,
#endif
#else /* CFG_NAND_LEGACY */
#else /* CONFIG_NAND_LEGACY */
/*
*
* Legacy NAND support - to be phased out
......@@ -1077,4 +1077,4 @@ U_BOOT_CMD(
#endif
#endif /* CFG_NAND_LEGACY */
#endif /* CONFIG_NAND_LEGACY */
......@@ -27,7 +27,7 @@
#endif
#if defined(CONFIG_CMD_NAND)
#if !defined(CFG_NAND_LEGACY)
#if !defined(CONFIG_NAND_LEGACY)
#include <nand.h>
#include <s3c2410.h>
......
......@@ -45,7 +45,7 @@
#include <asm/io.h>
#ifdef CFG_USE_NAND
#if !defined(CFG_NAND_LEGACY)
#if !defined(CONFIG_NAND_LEGACY)
#include <nand.h>
#include <asm/arch/nand_defs.h>
......
......@@ -31,7 +31,7 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY) && \
#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_NAND_LEGACY) && \
(defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \
......
......@@ -184,7 +184,7 @@ We now use a complete rewrite of the NAND code based on what is in
The old NAND handling code has been re-factored and is now confined
to only board-specific files and - unfortunately - to the DoC code
(see below). A new configuration variable has been introduced:
CFG_NAND_LEGACY, which has to be defined in the board config file if
CONFIG_NAND_LEGACY, which has to be defined in the board config file if
that board uses legacy code.
The necessary changes have been made to all affected boards, and no
......
......@@ -25,15 +25,19 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.a
ifdef CONFIG_CMD_NAND
ifndef CONFIG_NAND_LEGACY
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_ids.o
COBJS-y += nand_ecc.o
COBJS-y += nand_bbt.o
COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
endif
COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
COBJS-y += fsl_upm.o
COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
endif
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
......
......@@ -21,7 +21,7 @@
#include <common.h>
#if !defined(CFG_NAND_LEGACY)
#if !defined(CONFIG_NAND_LEGACY)
#include <linux/kernel.h>
#include <linux/init.h>
......
......@@ -11,8 +11,6 @@
*/
#include <config.h>
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_FSL_UPM)
#include <common.h>
#include <asm/io.h>
#include <asm/errno.h>
......@@ -150,4 +148,3 @@ int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun)
return 0;
}
#endif /* CONFIG_CMD_NAND */
......@@ -22,9 +22,6 @@
*/
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <nand.h>
#ifndef CFG_NAND_BASE_LIST
......@@ -79,5 +76,3 @@ void nand_init(void)
board_nand_select_device(nand_info[nand_curr_device].priv, nand_curr_device);
#endif
}
#endif
......@@ -59,8 +59,6 @@
#define ENOTSUPP 524 /* Operation is not supported */
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <malloc.h>
#include <watchdog.h>
#include <linux/err.h>
......@@ -2822,6 +2820,3 @@ MODULE_LICENSE("GPL");
MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
MODULE_DESCRIPTION("Generic NAND flash driver code");
#endif
#endif
......@@ -53,9 +53,6 @@
*/
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <malloc.h>
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
......@@ -1237,5 +1234,3 @@ int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)
EXPORT_SYMBOL(nand_scan_bbt);
EXPORT_SYMBOL(nand_default_bbt);
#endif
#endif
......@@ -39,8 +39,6 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
/* XXX U-BOOT XXX */
#if 0
#include <linux/types.h>
......@@ -215,5 +213,3 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat,
#if 0
EXPORT_SYMBOL(nand_correct_data);
#endif
#endif
......@@ -12,9 +12,6 @@
*/
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand.h>
/*
* Chip ID list
......@@ -147,4 +144,3 @@ struct nand_manufacturers nand_manuf_ids[] = {
{NAND_MFR_MICRON, "Micron"},
{0x0, "Unknown"}
};
#endif
......@@ -31,9 +31,6 @@
*/
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <command.h>
#include <watchdog.h>
#include <malloc.h>
......@@ -606,5 +603,3 @@ int nand_read_skip_bad(nand_info_t *nand, size_t offset, size_t *length,
return 0;
}
#endif /* defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY) */
......@@ -15,7 +15,7 @@
#include <asm/io.h>
#include <watchdog.h>
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#include <linux/mtd/nand_ids.h>
......
......@@ -146,7 +146,7 @@ static struct part_info *current_part;
#if (defined(CONFIG_JFFS2_NAND) && \
defined(CONFIG_CMD_NAND) )
#if defined(CFG_NAND_LEGACY)
#if defined(CONFIG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#else
#include <nand.h>
......@@ -161,7 +161,7 @@ static struct part_info *current_part;
*
*/
#if defined(CFG_NAND_LEGACY)
#if defined(CONFIG_NAND_LEGACY)
/* this one defined in nand_legacy.c */
int read_jffs2_nand(size_t start, size_t len,
size_t * retlen, u_char * buf, int nanddev);
......@@ -201,7 +201,7 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
}
}
#if defined(CFG_NAND_LEGACY)
#if defined(CONFIG_NAND_LEGACY)
if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE,
&retlen, nand_cache, id->num) < 0 ||
retlen != NAND_CACHE_SIZE) {
......
#include <common.h>
#if !defined(CFG_NAND_LEGACY) && defined(CONFIG_CMD_JFFS2)
#if !defined(CONFIG_NAND_LEGACY) && defined(CONFIG_CMD_JFFS2)
#include <malloc.h>
#include <linux/stat.h>
......
......@@ -86,7 +86,7 @@
/* CONFIG_CMD_DOC required legacy NAND support */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#if 0
#define CONFIG_PCI 1
......
......@@ -191,7 +191,7 @@
#endif
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
/*
* Miscellaneous configurable options
......
......@@ -280,7 +280,7 @@
#define CFG_FPGA_PROG_FEEDBACK
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
/*
* Verbose help from command monitor.
......
......@@ -262,7 +262,7 @@
*/
#if defined(CONFIG_CMD_NAND)
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_NAND0_BASE 0xE1000000
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
......
......@@ -88,7 +88,7 @@
#endif
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
......
......@@ -502,7 +502,7 @@
/****************************************************************/
/* NAND */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CONFIG_MTD_NAND_VERIFY_WRITE
......
......@@ -621,7 +621,7 @@
/****************************************************************/
/* NAND */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_MTD_NAND_UNSAFE
......
......@@ -503,7 +503,7 @@
/****************************************************************/
/* NAND */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CONFIG_MTD_NAND_VERIFY_WRITE
......
......@@ -397,7 +397,7 @@
/*****************************************************************************/
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
......
......@@ -84,7 +84,7 @@
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
/*
* Miscellaneous configurable options
......
......@@ -86,7 +86,7 @@
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
/*
* Miscellaneous configurable options
......
......@@ -77,7 +77,7 @@
#define CONFIG_CMD_BSP
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
......
......@@ -88,7 +88,7 @@
#if !defined(CONFIG_BOOT_ROM)
/* DoC requires legacy NAND for now */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#endif
......
......@@ -180,7 +180,7 @@
#endif
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
/*
* Disk-On-Chip configuration
......
......@@ -183,7 +183,7 @@
/*
* Disk-On-Chip configuration
*/
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_DOC_SHORT_TIMEOUT
#define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */
......
......@@ -195,7 +195,7 @@
*/
/* NAND flash support */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
......
......@@ -345,7 +345,7 @@
/* NAND FLASH */
#ifdef CONFIG_NAND
#undef CFG_NAND_LEGACY
#undef CONFIG_NAND_LEGACY
#define CONFIG_NAND_FSL_UPM 1
......
......@@ -254,7 +254,7 @@
*/
#if defined(CONFIG_CMD_NAND)
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
......
......@@ -116,7 +116,7 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
......
......@@ -217,7 +217,7 @@
/*
* NAND Flash
*/
#undef CFG_NAND_LEGACY
#undef CONFIG_NAND_LEGACY
#define CFG_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */
#undef CFG_NAND1_BASE
......
......@@ -151,7 +151,7 @@
/*
* Board NAND Info.
*/
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
......
......@@ -449,7 +449,7 @@
/****************************************************************/
/* NAND */
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
#define CFG_NAND_BASE NAND_BASE
#define CONFIG_MTD_NAND_ECC_JFFS2
#define CONFIG_MTD_NAND_VERIFY_WRITE
......
......@@ -151,7 +151,7 @@
#define CONFIG_CMD_DATE
#define CFG_NAND_LEGACY
#define CONFIG_NAND_LEGACY
/*
* Miscellaneous configurable options
......
......@@ -28,7 +28,7 @@
#ifndef __LINUX_MTD_NAND_IDS_H
#define __LINUX_MTD_NAND_IDS_H
#ifndef CFG_NAND_LEGACY
#ifndef CONFIG_NAND_LEGACY
#error This module is for the legacy NAND support
#endif
......
......@@ -36,7 +36,7 @@
#ifndef __LINUX_MTD_NAND_LEGACY_H
#define __LINUX_MTD_NAND_LEGACY_H
#ifndef CFG_NAND_LEGACY
#ifndef CONFIG_NAND_LEGACY
#error This module is for the legacy NAND support
#endif
......
......@@ -26,7 +26,7 @@
extern void nand_init(void);
#ifndef CFG_NAND_LEGACY
#ifndef CONFIG_NAND_LEGACY
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
......@@ -128,5 +128,5 @@ void board_nand_select_device(struct nand_chip *nand, int chip);
__attribute__((noreturn)) void nand_boot(void);
#endif /* !CFG_NAND_LEGACY */
#endif /* !CONFIG_NAND_LEGACY */
#endif
......@@ -174,7 +174,7 @@ uint32_t ZEXPORT crc32 (uint32_t crc, const Bytef *buf, uInt len)
#if defined(CONFIG_CMD_JFFS2) || \
(defined(CONFIG_CMD_NAND) \
&& !defined(CFG_NAND_LEGACY))
&& !defined(CONFIG_NAND_LEGACY))
/* No ones complement version. JFFS2 (and other things ?)
* don't use ones compliment in their CRC calculations.
......
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